Merge changes from topic "el3spmc-fix-v2.12-rc0" into integration
* changes:
feat(qemu): increase size of bl31
fix(qemu): fix EL3-SPMC data store alignment
fix(qemu): fix build error with spmd
diff --git a/plat/qemu/common/qemu_common.c b/plat/qemu/common/qemu_common.c
index 068c69c..9ccb2c8 100644
--- a/plat/qemu/common/qemu_common.c
+++ b/plat/qemu/common/qemu_common.c
@@ -178,7 +178,7 @@
*/
#define PLAT_SPMC_SHMEM_DATASTORE_SIZE 64 * 1024
-uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE];
+uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE] __aligned(2 * sizeof(long));
int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
{
@@ -198,16 +198,17 @@
}
#endif
-#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
-/*
- * A dummy implementation of the platform handler for Group0 secure interrupt.
- */
+#if defined(SPD_spmd)
int plat_spmd_handle_group0_interrupt(uint32_t intid)
{
+ /*
+ * Currently, there are no sources of Group0 secure interrupt
+ * enabled for QEMU.
+ */
(void)intid;
return -1;
}
-#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
+#endif /*defined(SPD_spmd)*/
#if ENABLE_RME
/*
diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h
index f78be90..0c85b1e 100644
--- a/plat/qemu/qemu/include/platform_def.h
+++ b/plat/qemu/qemu/include/platform_def.h
@@ -150,7 +150,7 @@
* Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
* current BL3-1 debug size plus a little space for growth.
*/
-#define BL31_BASE (BL31_LIMIT - 0x60000)
+#define BL31_BASE (BL31_LIMIT - 0x70000)
#define BL31_LIMIT (BL_RAM_BASE + BL_RAM_SIZE - FW_HANDOFF_SIZE)
#define BL31_PROGBITS_LIMIT BL1_RW_BASE