Merge "Fix 'tautological-constant-compare' error" into integration
diff --git a/Makefile b/Makefile
index 47a544d..8049a18 100644
--- a/Makefile
+++ b/Makefile
@@ -364,7 +364,8 @@
endif
DTC_FLAGS += -I dts -O dtb
-DTC_CPPFLAGS += -P -nostdinc -Iinclude -Ifdts -undef -x assembler-with-cpp
+DTC_CPPFLAGS += -P -nostdinc -Iinclude -Ifdts -undef \
+ -x assembler-with-cpp $(DEFINES)
################################################################################
# Common sources and include directories
@@ -826,7 +827,7 @@
$(eval $(call assert_boolean,TRUSTED_BOARD_BOOT))
$(eval $(call assert_boolean,USE_COHERENT_MEM))
$(eval $(call assert_boolean,USE_DEBUGFS))
-$(eval $(call assert_boolean,USE_FCONF_BASED_IO))
+$(eval $(call assert_boolean,ARM_IO_IN_DTB))
$(eval $(call assert_boolean,USE_ROMLIB))
$(eval $(call assert_boolean,USE_TBBR_DEFS))
$(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY))
@@ -904,7 +905,7 @@
$(eval $(call add_define,TRUSTED_BOARD_BOOT))
$(eval $(call add_define,USE_COHERENT_MEM))
$(eval $(call add_define,USE_DEBUGFS))
-$(eval $(call add_define,USE_FCONF_BASED_IO))
+$(eval $(call add_define,ARM_IO_IN_DTB))
$(eval $(call add_define,USE_ROMLIB))
$(eval $(call add_define,USE_TBBR_DEFS))
$(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY))
@@ -938,13 +939,18 @@
endif
# Generate and include sp_gen.mk if SPD is spmd and SP_LAYOUT_FILE is defined
-ifdef SP_LAYOUT_FILE
ifeq (${SPD},spmd)
+ifdef SP_LAYOUT_FILE
+ ifeq (${SPMD_SPM_AT_SEL2},0)
+ $(error "SPMD with SPM at S-EL1 does not require SP_LAYOUT_FILE")
+ endif
-include $(BUILD_PLAT)/sp_gen.mk
FIP_DEPS += sp
NEED_SP_PKG := yes
else
- $(error "SP_LAYOUT_FILE will be used only if SPD=spmd")
+ ifeq (${SPMD_SPM_AT_SEL2},1)
+ $(error "SPMD with SPM at S-EL2 require SP_LAYOUT_FILE")
+ endif
endif
endif
diff --git a/docs/components/spci-manifest-binding.rst b/docs/components/spci-manifest-binding.rst
new file mode 100644
index 0000000..66cca64
--- /dev/null
+++ b/docs/components/spci-manifest-binding.rst
@@ -0,0 +1,239 @@
+SPCI manifest binding to device tree
+====================================
+
+This document defines the nodes and properties used to define a partition,
+according to the SPCI specification.
+
+Version 1.0
+-----------
+
+spci-manifest-partition
+^^^^^^^^^^^^^^^^^^^^^^^
+
+- compatible [mandatory]
+ - value type: <string>
+ - Must be the string "arm,spci-manifest-X.Y" which specifies the major and
+ minor versions fo the device tree binding for the SPCI manifest represented
+ by this node. The minor number is incremented if the binding changes in a
+ backwards compatible manner.
+ - X is an integer representing the major version number of this document.
+ - Y is an integer representing the minor version number of this document.
+
+- spci-version [mandatory]
+ - value type: <u32>
+ - Must be two 16 bits values (X, Y), concatenated as 31:16 -> X,
+ 15:0 -> Y, where:
+ - X is the major version of PSA-FF-A expected by the partition at the SPCI
+ instance it will execute.
+ - Y is the minor version of PSA-FF-A expected by the partition at the SPCI
+ instance it will execute.
+
+- uuid [mandatory]
+ - value type: <prop-encoded-array>
+ - An array consisting of 4 <u32> values, identifying the UUID of the service
+ implemented by this partition. The UUID format is described in RFC 4122.
+ UUID can be shared by multiple instances of partitions that offer the same
+ service For example:
+ - If there are multiple instances of a Trusted OS, then the UUID can be
+ shared by all instances.
+ - The TEE driver in the HLOS can use the UUID with the
+ SPCI_PARTITION_INFO_GET interface to determine the:
+ - Number of Trusted OSs
+ - The partition ID of each instance of the Trusted OS
+
+- id
+ - value type: <u32>
+ - Pre-allocated partition ID.
+
+- auxiliary-id
+ - value type: <u32>
+ - Pre-allocated ID that could be used in memory management transactions.
+
+- description
+ - value type: <string>
+ - Name of the partition e.g. for debugging purposes.
+
+- execution-ctx-count [mandatory]
+ - value type: <u32>
+ - Number of vCPUs that a VM or SP wants to instantiate.
+ - In the absence of virtualization, this is the number of execution
+ contexts that a partition implements.
+ - If value of this field = 1 and number of PEs > 1 then the partition is
+ treated as UP & migrate capable.
+ - If the value of this field > 1 then the partition is treated as a MP
+ capable partition irrespective of the number of PEs.
+
+- exception-level [mandatory]
+ - value type: <u32>
+ - The target exception level for the partition:
+ - 0x0: EL1
+ - 0x1: S_EL0
+ - 0x2: S_EL1
+ - 0x3: EL2
+ - 0x4: Supervisor mode
+ - 0x5: Secure User mode
+
+- execution-state [mandatory]
+ - value type: <u32>
+ - The target execution state of the partition:
+ - 0: AArch64
+ - 1: AArch32
+
+- load-address
+ - value type: <u64>
+ - Physical base address of the partition in memory. Absence of this field
+ indicates that the partition is position independent and can be loaded at
+ any address chosen at boot time.
+
+- entrypoint-offset
+ - value type: <u64>
+ - Offset from the base of the partition's binary image to the entry point of
+ the partition. Absence of this field indicates that the entry point is at
+ offset 0x0 from the base of the partition's binary.
+
+- xlat-granule [mandatory]
+ - value type: <u32>
+ - Translation granule used with the partition:
+ - 0x0: 4k
+ - 0x1: 16k
+ - 0x2: 32k
+
+- boot-order
+ - value type: <u32>
+ - A unique number amongst all partitions that specifies if this partition
+ must be booted before others. The partition with the smaller number will be
+ booted first.
+
+- rx-tx-buffer
+ - value type: "memory-regions" node
+ - Specific "memory-regions" nodes that describe the RX/TX buffers expected
+ by the partition.
+ The "compatible" must be the string "arm,spci-manifest-rx_tx-buffer".
+
+- messaging-method [mandatory]
+ - value type: <u32>
+ - Specifies which messaging methods are supported by the partition:
+ - 0x0: direct messaging method
+ - 0x1: indirect messaging method
+ - 0x2: both direct and indirect messaging methods
+
+- has-primary-scheduler
+ - value type: <empty>
+ - Presence of this field indicates that the partition implements the primary
+ scheduler. If so, run-time EL must be EL1.
+
+- run-time-model
+ - value type: <u32>
+ - Run time model that the SPM must enforce for this SP:
+ - 0x0: Run to completion
+ - 0x1: Preemptible
+
+- time-slice-mem
+ - value type: <empty>
+ - Presence of this field indicates that the partition doesn't expect the
+ partition manager to time slice long running memory management functions.
+
+- gp-register-num
+ - value type: <u32>
+ - Presence of this field indicates that the partition expects the
+ spci_init_info structure to be passed in via the specified general purpose
+ register.
+ The field specifies the general purpose register number but not its width.
+ The width is derived from the partition's execution state, as specified in
+ the partition properties. For example, if the number value is 1 then the
+ general-purpose register used will be x1 in AArch64 state and w1 in AArch32
+ state.
+
+- stream-endpoint-ids
+ - value type: <prop-encoded-array>
+ - List of <u32> tuples, identifying the IDs this partition is acting as
+ proxy for.
+
+memory-regions
+--------------
+
+- compatible [mandatory]
+ - value type: <string>
+ - Must be the string "arm,spci-manifest-memory-regions".
+
+- description
+ - value type: <string>
+ - Name of the memory region e.g. for debugging purposes.
+
+- pages-count [mandatory]
+ - value type: <u32>
+ - Count of pages of memory region as a multiple of the translation granule
+ size
+
+- attributes [mandatory]
+ - value type: <u32>
+ - ?? TO DEFINE
+
+- base-address
+ - value type: <u64>
+ - Base address of the region. The address must be aligned to the translation
+ granule size.
+ The address given may be a Physical Address (PA), Virtual Address (VA), or
+ Intermediate Physical Address (IPA). Refer to the SPCI specification for
+ more information on the restrictions around the address type.
+ If the base address is omitted then the partition manager must map a memory
+ region of the specified size into the partition's translation regime and
+ then communicate the region properties (including the base address chosen
+ by the partition manager) to the partition.
+
+device-regions
+--------------
+
+- compatible [mandatory]
+ - value type: <string>
+ - Must be the string "arm,spci-manifest-device-regions".
+
+- description
+ - value type: <string>
+ - Name of the device region e.g. for debugging purposes.
+
+- reg [mandatory]
+ - value type: <prop-encoded-array>
+ - A (address, num-pages) pair describing the device, where:
+ - address: The physical base address <u64> value of the device MMIO
+ region.
+ - num-pages: The <u32> number of pages of the region. The total size of
+ the region is this value multiplied by the translation granule size.
+
+- attributes [mandatory]
+ - value type: <u32>
+ - ?? TO DEFINE
+
+- smmu-id
+ - value type: <u32>
+ - On systems with multiple System Memory Management Units (SMMUs) this
+ identifier is used to inform the partition manager which SMMU the device is
+ upstream of. If the field is omitted then it is assumed that the device is
+ not upstream of any SMMU.
+
+- stream-ids [mandatory]
+ - value type: <prop-encoded-array>
+ - A list of (id, mem-manage) pair, where:
+ - id: A unique <u32> value amongst all devices assigned to the partition.
+ - mem-manage: A <u32> value used in memory management operations.
+
+- interrupts [mandatory]
+ - value type: <prop-encoded-array>
+ - A list of (id, attributes) pair describing the device interrupts, where:
+ - id: The <u32> interrupt IDs.
+ - attributes: A ?? TO DEFINE value,
+ containing the attributes for each interrupt ID:
+ - Interrupt type: SPI, PPI, SGI
+ - Interrupt configuration: Edge triggered, Level triggered
+ - Interrupt security state: Secure, Non-secure
+ - Interrupt priority value
+ - Target execution context/vCPU for each SPI
+
+- exclusive-access
+ - value type: <empty>
+ - Presence of this field implies that this endpoint must be granted exclusive
+ access and ownership of this devices's MMIO region.
+
+--------------
+
+*Copyright (c) 2019-2020, Arm Limited and Contributors. All rights reserved.*
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index f138feb..e53f714 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -622,8 +622,8 @@
exposing a virtual filesystem interface through BL31 as a SiP SMC function.
Default is 0.
-- ``USE_FCONF_BASED_IO``: This flag determines whether to use IO based on the
- firmware configuration framework. This allows moving the io_policies into a
+- ``ARM_IO_IN_DTB``: This flag determines whether to use IO based on the
+ firmware configuration framework. This will move the io_policies into a
configuration device tree, instead of static structure in the code base.
diff --git a/fdts/corstone700.dts b/fdts/corstone700.dts
index c13d3b2..851f5e6 100644
--- a/fdts/corstone700.dts
+++ b/fdts/corstone700.dts
@@ -15,8 +15,6 @@
chosen {
bootargs = "console=ttyAMA0 \
- root=mtd:physmap-flash.0 \
- ro \
loglevel=9";
};
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h
index e061950..0029658 100644
--- a/include/lib/el3_runtime/aarch64/context.h
+++ b/include/lib/el3_runtime/aarch64/context.h
@@ -183,7 +183,7 @@
#define CTX_SPSR_EL2 U(0xd0)
#define CTX_SP_EL2 U(0xd8)
#define CTX_TCR_EL2 U(0xe0)
-#define CTX_TRFCR_EL2 U(0xe8)
+#define CTX_TPIDR_EL2 U(0xe8)
#define CTX_TTBR0_EL2 U(0xf0)
#define CTX_VBAR_EL2 U(0xf8)
#define CTX_VMPIDR_EL2 U(0x100)
@@ -234,11 +234,13 @@
#define CTX_VSESR_EL2 U(0x228)
#define CTX_VSTCR_EL2 U(0x230)
#define CTX_VSTTBR_EL2 U(0x238)
+#define CTX_TRFCR_EL2 U(0x240)
// Starting with Armv8.5
-#define CTX_SCXTNUM_EL2 U(0x240)
+#define CTX_SCXTNUM_EL2 U(0x248)
/* Align to the next 16 byte boundary */
#define CTX_EL2_SYSREGS_END U(0x250)
+
#endif /* CTX_INCLUDE_EL2_REGS */
/*******************************************************************************
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 30ad7b7..221f33e 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -100,7 +100,7 @@
stp x10, x11, [x0, #CTX_SPSR_EL2]
mrs x12, tcr_el2
- mrs x13, TRFCR_EL2
+ mrs x13, tpidr_el2
stp x12, x13, [x0, #CTX_TCR_EL2]
mrs x14, ttbr0_el2
@@ -204,11 +204,14 @@
mrs x16, vsttbr_el2
str x16, [x0, #CTX_VSTTBR_EL2]
+
+ mrs x17, TRFCR_EL2
+ str x17, [x0, #CTX_TRFCR_EL2]
#endif
#if ARM_ARCH_AT_LEAST(8, 5)
- mrs x17, scxtnum_el2
- str x17, [x0, #CTX_SCXTNUM_EL2]
+ mrs x9, scxtnum_el2
+ str x9, [x0, #CTX_SCXTNUM_EL2]
#endif
ret
@@ -289,7 +292,7 @@
ldp x12, x13, [x0, #CTX_TCR_EL2]
msr tcr_el2, x12
- msr TRFCR_EL2, x13
+ msr tpidr_el2, x13
ldp x14, x15, [x0, #CTX_TTBR0_EL2]
msr ttbr0_el2, x14
@@ -391,11 +394,14 @@
ldr x16, [x0, #CTX_VSTTBR_EL2]
msr vsttbr_el2, x16
+
+ ldr x17, [x0, #CTX_TRFCR_EL2]
+ msr TRFCR_EL2, x17
#endif
#if ARM_ARCH_AT_LEAST(8, 5)
- ldr x17, [x0, #CTX_SCXTNUM_EL2]
- msr scxtnum_el2, x17
+ ldr x9, [x0, #CTX_SCXTNUM_EL2]
+ msr scxtnum_el2, x9
#endif
ret
diff --git a/lib/fconf/fconf.c b/lib/fconf/fconf.c
index 9ce4635..3007273 100644
--- a/lib/fconf/fconf.c
+++ b/lib/fconf/fconf.c
@@ -33,7 +33,7 @@
err = load_auth_image(TB_FW_CONFIG_ID, &arm_tb_fw_info);
if (err != 0) {
/* Return if FW_CONFIG is not loaded */
- VERBOSE("Failed to load FW_CONFIG\n");
+ WARN("Failed to load FW_CONFIG\n");
return;
}
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index 03322db..4e968e2 100644
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -223,7 +223,7 @@
USE_DEBUGFS := 0
# Build option to fconf based io
-USE_FCONF_BASED_IO := 0
+ARM_IO_IN_DTB := 0
# Build option to choose whether Trusted Firmware uses library at ROM
USE_ROMLIB := 0
diff --git a/plat/arm/board/a5ds/platform.mk b/plat/arm/board/a5ds/platform.mk
index 7198842..3a4d5e5 100644
--- a/plat/arm/board/a5ds/platform.mk
+++ b/plat/arm/board/a5ds/platform.mk
@@ -41,6 +41,7 @@
plat/arm/common/arm_err.c \
plat/arm/board/a5ds/a5ds_err.c \
plat/arm/common/arm_io_storage.c \
+ plat/arm/common/fconf/arm_fconf_io.c \
plat/arm/board/a5ds/${ARCH}/a5ds_helpers.S \
plat/arm/board/a5ds/a5ds_bl1_setup.c \
lib/aarch32/arm32_aeabi_divmod.c \
@@ -61,6 +62,7 @@
plat/arm/common/arm_err.c \
plat/arm/board/a5ds/a5ds_err.c \
plat/arm/common/arm_io_storage.c \
+ plat/arm/common/fconf/arm_fconf_io.c \
plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
plat/arm/common/arm_image_load.c \
common/desc_image_load.c \
diff --git a/plat/arm/board/fvp/fdts/fvp_fw_config.dts b/plat/arm/board/fvp/fdts/fvp_fw_config.dts
index 61bd69c..704bf29 100644
--- a/plat/arm/board/fvp/fdts/fvp_fw_config.dts
+++ b/plat/arm/board/fvp/fdts/fvp_fw_config.dts
@@ -75,6 +75,7 @@
* stored in machine order (little endian).
* This will be fixed in future.
*/
+#if ARM_IO_IN_DTB
arm-io_policies {
fip-handles {
compatible = "arm,io-fip-handle";
@@ -99,6 +100,7 @@
nt_fw_content_cert_uuid = <0xf3c1c48e 0x11e4635d 0xee87a9a7 0xa73fb240>;
};
};
+#endif /* ARM_IO_IN_DTB */
secure-partitions {
compatible = "arm,sp";
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 4e20632..e64c4d4 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -10,11 +10,6 @@
# Use the SP804 timer instead of the generic one
FVP_USE_SP804_TIMER := 0
-# Use fconf based io for FVP
-ifeq ($(BL2_AT_EL3), 0)
-USE_FCONF_BASED_IO := 1
-endif
-
# Default cluster count for FVP
FVP_CLUSTER_COUNT := 2
diff --git a/plat/arm/board/fvp_ve/platform.mk b/plat/arm/board/fvp_ve/platform.mk
index 7883719..9ada86b 100644
--- a/plat/arm/board/fvp_ve/platform.mk
+++ b/plat/arm/board/fvp_ve/platform.mk
@@ -42,6 +42,7 @@
plat/arm/common/arm_err.c \
plat/arm/board/fvp_ve/fvp_ve_err.c \
plat/arm/common/arm_io_storage.c \
+ plat/arm/common/fconf/arm_fconf_io.c \
drivers/cfi/v2m/v2m_flash.c \
plat/arm/board/fvp_ve/${ARCH}/fvp_ve_helpers.S \
plat/arm/board/fvp_ve/fvp_ve_bl1_setup.c \
@@ -63,6 +64,7 @@
plat/arm/common/arm_err.c \
plat/arm/board/fvp_ve/fvp_ve_err.c \
plat/arm/common/arm_io_storage.c \
+ plat/arm/common/fconf/arm_fconf_io.c \
plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
plat/arm/common/arm_image_load.c \
common/desc_image_load.c \
diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index d9fc84e..6c3f64f 100644
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -205,7 +205,7 @@
******************************************************************************/
int arm_bl2_plat_handle_post_image_load(unsigned int image_id)
{
-#if defined(SPD_spmd)
+#if defined(SPD_spmd) && SPMD_SPM_AT_SEL2
/* For Secure Partitions we don't need post processing */
if ((image_id >= (MAX_NUMBER_IDS - MAX_SP_IDS)) &&
(image_id < MAX_NUMBER_IDS)) {
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 65f6bf3..3b0c39d 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -177,14 +177,12 @@
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
endif
-ifeq (${USE_FCONF_BASED_IO}, 0)
-ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c
-else
-ARM_IO_SOURCES += plat/arm/common/arm_fconf_io_storage.c \
+ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
plat/arm/common/fconf/arm_fconf_io.c
ifeq (${SPD},spmd)
-ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
-endif
+ ifeq (${SPMD_SPM_AT_SEL2},1)
+ ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
+ endif
endif
BL1_SOURCES += drivers/io/io_fip.c \
diff --git a/plat/arm/common/arm_fconf_io_storage.c b/plat/arm/common/arm_fconf_io_storage.c
deleted file mode 100644
index 6fcfbd6..0000000
--- a/plat/arm/common/arm_fconf_io_storage.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2015-2020, ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <assert.h>
-
-#include <common/debug.h>
-#include <drivers/io/io_driver.h>
-#include <drivers/io/io_fip.h>
-#include <drivers/io/io_memmap.h>
-#include <drivers/io/io_storage.h>
-#include <lib/utils.h>
-
-#include <plat/arm/common/arm_fconf_getter.h>
-#include <plat/arm/common/arm_fconf_io_storage.h>
-#include <plat/arm/common/plat_arm.h>
-#include <plat/common/platform.h>
-#include <platform_def.h>
-
-/* IO devices */
-static const io_dev_connector_t *fip_dev_con;
-uintptr_t fip_dev_handle;
-static const io_dev_connector_t *memmap_dev_con;
-uintptr_t memmap_dev_handle;
-
-/* Weak definitions may be overridden in specific ARM standard platform */
-#pragma weak plat_arm_io_setup
-#pragma weak plat_arm_get_alt_image_source
-
-int open_fip(const uintptr_t spec)
-{
- int result;
- uintptr_t local_image_handle;
-
- /* See if a Firmware Image Package is available */
- result = io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
- if (result == 0) {
- result = io_open(fip_dev_handle, spec, &local_image_handle);
- if (result == 0) {
- VERBOSE("Using FIP\n");
- io_close(local_image_handle);
- }
- }
- return result;
-}
-
-int open_memmap(const uintptr_t spec)
-{
- int result;
- uintptr_t local_image_handle;
-
- result = io_dev_init(memmap_dev_handle, (uintptr_t)NULL);
- if (result == 0) {
- result = io_open(memmap_dev_handle, spec, &local_image_handle);
- if (result == 0) {
- VERBOSE("Using Memmap\n");
- io_close(local_image_handle);
- }
- }
- return result;
-}
-
-int arm_io_setup(void)
-{
- int io_result;
-
- io_result = register_io_dev_fip(&fip_dev_con);
- if (io_result < 0) {
- return io_result;
- }
-
- io_result = register_io_dev_memmap(&memmap_dev_con);
- if (io_result < 0) {
- return io_result;
- }
-
- /* Open connections to devices and cache the handles */
- io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
- &fip_dev_handle);
- if (io_result < 0) {
- return io_result;
- }
-
- io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
- &memmap_dev_handle);
-
- return io_result;
-}
-
-void plat_arm_io_setup(void)
-{
- int err;
-
- err = arm_io_setup();
- if (err < 0) {
- panic();
- }
-}
-
-int plat_arm_get_alt_image_source(
- unsigned int image_id __unused,
- uintptr_t *dev_handle __unused,
- uintptr_t *image_spec __unused)
-{
- /* By default do not try an alternative */
- return -ENOENT;
-}
-
-/* Return an IO device handle and specification which can be used to access
- * an image. Use this to enforce platform load policy */
-int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
- uintptr_t *image_spec)
-{
- int result;
- const struct plat_io_policy *policy;
-
- assert(image_id < MAX_NUMBER_IDS);
-
- policy = FCONF_GET_PROPERTY(arm, io_policies, image_id);
- result = policy->check(policy->image_spec);
- if (result == 0) {
- *image_spec = policy->image_spec;
- *dev_handle = *(policy->dev_handle);
- } else {
- VERBOSE("Trying alternative IO\n");
- result = plat_arm_get_alt_image_source(image_id, dev_handle,
- image_spec);
- }
-
- return result;
-}
-
-/*
- * See if a Firmware Image Package is available,
- * by checking if TOC is valid or not.
- */
-bool arm_io_is_toc_valid(void)
-{
- return (io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID) == 0);
-}
diff --git a/plat/arm/common/arm_image_load.c b/plat/arm/common/arm_image_load.c
index 593199d..ed7f1f5 100644
--- a/plat/arm/common/arm_image_load.c
+++ b/plat/arm/common/arm_image_load.c
@@ -32,11 +32,11 @@
next_bl_params_cpy_ptr);
}
-#if defined(SPD_spmd)
+#if defined(SPD_spmd) && SPMD_SPM_AT_SEL2
/*******************************************************************************
* This function appends Secure Partitions to list of loadable images.
******************************************************************************/
-void plat_add_sp_images_load_info(struct bl_load_info *load_info)
+static void plat_add_sp_images_load_info(struct bl_load_info *load_info)
{
bl_load_info_node_t *node_info = load_info->head;
unsigned int index = 0;
@@ -78,7 +78,7 @@
******************************************************************************/
struct bl_load_info *plat_get_bl_image_load_info(void)
{
-#if defined(SPD_spmd)
+#if defined(SPD_spmd) && SPMD_SPM_AT_SEL2
bl_load_info_t *bl_load_info;
bl_load_info = get_bl_load_info_from_mem_params_desc();
diff --git a/plat/arm/common/arm_io_storage.c b/plat/arm/common/arm_io_storage.c
index f5d8a41..6fcfbd6 100644
--- a/plat/arm/common/arm_io_storage.c
+++ b/plat/arm/common/arm_io_storage.c
@@ -1,13 +1,10 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
-#include <string.h>
-
-#include <platform_def.h>
#include <common/debug.h>
#include <drivers/io/io_driver.h>
@@ -15,249 +12,24 @@
#include <drivers/io/io_memmap.h>
#include <drivers/io/io_storage.h>
#include <lib/utils.h>
+
+#include <plat/arm/common/arm_fconf_getter.h>
+#include <plat/arm/common/arm_fconf_io_storage.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
-#include <tools_share/firmware_image_package.h>
+#include <platform_def.h>
/* IO devices */
static const io_dev_connector_t *fip_dev_con;
-static uintptr_t fip_dev_handle;
+uintptr_t fip_dev_handle;
static const io_dev_connector_t *memmap_dev_con;
-static uintptr_t memmap_dev_handle;
-
-static const io_block_spec_t fip_block_spec = {
- .offset = PLAT_ARM_FIP_BASE,
- .length = PLAT_ARM_FIP_MAX_SIZE
-};
-
-static const io_uuid_spec_t bl2_uuid_spec = {
- .uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
-};
-
-static const io_uuid_spec_t scp_bl2_uuid_spec = {
- .uuid = UUID_SCP_FIRMWARE_SCP_BL2,
-};
-
-static const io_uuid_spec_t bl31_uuid_spec = {
- .uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
-};
-
-static const io_uuid_spec_t bl32_uuid_spec = {
- .uuid = UUID_SECURE_PAYLOAD_BL32,
-};
-
-static const io_uuid_spec_t bl32_extra1_uuid_spec = {
- .uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA1,
-};
-
-static const io_uuid_spec_t bl32_extra2_uuid_spec = {
- .uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
-};
-
-static const io_uuid_spec_t bl33_uuid_spec = {
- .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
-};
-
-static const io_uuid_spec_t tb_fw_config_uuid_spec = {
- .uuid = UUID_TB_FW_CONFIG,
-};
-
-static const io_uuid_spec_t hw_config_uuid_spec = {
- .uuid = UUID_HW_CONFIG,
-};
-
-static const io_uuid_spec_t soc_fw_config_uuid_spec = {
- .uuid = UUID_SOC_FW_CONFIG,
-};
-
-static const io_uuid_spec_t tos_fw_config_uuid_spec = {
- .uuid = UUID_TOS_FW_CONFIG,
-};
-
-static const io_uuid_spec_t nt_fw_config_uuid_spec = {
- .uuid = UUID_NT_FW_CONFIG,
-};
-
-#if TRUSTED_BOARD_BOOT
-static const io_uuid_spec_t tb_fw_cert_uuid_spec = {
- .uuid = UUID_TRUSTED_BOOT_FW_CERT,
-};
-
-static const io_uuid_spec_t trusted_key_cert_uuid_spec = {
- .uuid = UUID_TRUSTED_KEY_CERT,
-};
-
-static const io_uuid_spec_t scp_fw_key_cert_uuid_spec = {
- .uuid = UUID_SCP_FW_KEY_CERT,
-};
-
-static const io_uuid_spec_t soc_fw_key_cert_uuid_spec = {
- .uuid = UUID_SOC_FW_KEY_CERT,
-};
-
-static const io_uuid_spec_t tos_fw_key_cert_uuid_spec = {
- .uuid = UUID_TRUSTED_OS_FW_KEY_CERT,
-};
-
-static const io_uuid_spec_t nt_fw_key_cert_uuid_spec = {
- .uuid = UUID_NON_TRUSTED_FW_KEY_CERT,
-};
-
-static const io_uuid_spec_t scp_fw_cert_uuid_spec = {
- .uuid = UUID_SCP_FW_CONTENT_CERT,
-};
-
-static const io_uuid_spec_t soc_fw_cert_uuid_spec = {
- .uuid = UUID_SOC_FW_CONTENT_CERT,
-};
-
-static const io_uuid_spec_t tos_fw_cert_uuid_spec = {
- .uuid = UUID_TRUSTED_OS_FW_CONTENT_CERT,
-};
-
-static const io_uuid_spec_t nt_fw_cert_uuid_spec = {
- .uuid = UUID_NON_TRUSTED_FW_CONTENT_CERT,
-};
-#endif /* TRUSTED_BOARD_BOOT */
-
-
-static int open_fip(const uintptr_t spec);
-static int open_memmap(const uintptr_t spec);
-
-struct plat_io_policy {
- uintptr_t *dev_handle;
- uintptr_t image_spec;
- int (*check)(const uintptr_t spec);
-};
-
-/* By default, ARM platforms load images from the FIP */
-static const struct plat_io_policy policies[] = {
- [FIP_IMAGE_ID] = {
- &memmap_dev_handle,
- (uintptr_t)&fip_block_spec,
- open_memmap
- },
- [BL2_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl2_uuid_spec,
- open_fip
- },
- [SCP_BL2_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&scp_bl2_uuid_spec,
- open_fip
- },
- [BL31_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl31_uuid_spec,
- open_fip
- },
- [BL32_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl32_uuid_spec,
- open_fip
- },
- [BL32_EXTRA1_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl32_extra1_uuid_spec,
- open_fip
- },
- [BL32_EXTRA2_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl32_extra2_uuid_spec,
- open_fip
- },
- [BL33_IMAGE_ID] = {
- &fip_dev_handle,
- (uintptr_t)&bl33_uuid_spec,
- open_fip
- },
- [TB_FW_CONFIG_ID] = {
- &fip_dev_handle,
- (uintptr_t)&tb_fw_config_uuid_spec,
- open_fip
- },
- [HW_CONFIG_ID] = {
- &fip_dev_handle,
- (uintptr_t)&hw_config_uuid_spec,
- open_fip
- },
- [SOC_FW_CONFIG_ID] = {
- &fip_dev_handle,
- (uintptr_t)&soc_fw_config_uuid_spec,
- open_fip
- },
- [TOS_FW_CONFIG_ID] = {
- &fip_dev_handle,
- (uintptr_t)&tos_fw_config_uuid_spec,
- open_fip
- },
- [NT_FW_CONFIG_ID] = {
- &fip_dev_handle,
- (uintptr_t)&nt_fw_config_uuid_spec,
- open_fip
- },
-#if TRUSTED_BOARD_BOOT
- [TRUSTED_BOOT_FW_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&tb_fw_cert_uuid_spec,
- open_fip
- },
- [TRUSTED_KEY_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&trusted_key_cert_uuid_spec,
- open_fip
- },
- [SCP_FW_KEY_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&scp_fw_key_cert_uuid_spec,
- open_fip
- },
- [SOC_FW_KEY_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&soc_fw_key_cert_uuid_spec,
- open_fip
- },
- [TRUSTED_OS_FW_KEY_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&tos_fw_key_cert_uuid_spec,
- open_fip
- },
- [NON_TRUSTED_FW_KEY_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&nt_fw_key_cert_uuid_spec,
- open_fip
- },
- [SCP_FW_CONTENT_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&scp_fw_cert_uuid_spec,
- open_fip
- },
- [SOC_FW_CONTENT_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&soc_fw_cert_uuid_spec,
- open_fip
- },
- [TRUSTED_OS_FW_CONTENT_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&tos_fw_cert_uuid_spec,
- open_fip
- },
- [NON_TRUSTED_FW_CONTENT_CERT_ID] = {
- &fip_dev_handle,
- (uintptr_t)&nt_fw_cert_uuid_spec,
- open_fip
- },
-#endif /* TRUSTED_BOARD_BOOT */
-};
-
+uintptr_t memmap_dev_handle;
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak plat_arm_io_setup
#pragma weak plat_arm_get_alt_image_source
-
-static int open_fip(const uintptr_t spec)
+int open_fip(const uintptr_t spec)
{
int result;
uintptr_t local_image_handle;
@@ -274,8 +46,7 @@
return result;
}
-
-static int open_memmap(const uintptr_t spec)
+int open_memmap(const uintptr_t spec)
{
int result;
uintptr_t local_image_handle;
@@ -291,7 +62,6 @@
return result;
}
-
int arm_io_setup(void)
{
int io_result;
@@ -346,9 +116,9 @@
int result;
const struct plat_io_policy *policy;
- assert(image_id < ARRAY_SIZE(policies));
+ assert(image_id < MAX_NUMBER_IDS);
- policy = &policies[image_id];
+ policy = FCONF_GET_PROPERTY(arm, io_policies, image_id);
result = policy->check(policy->image_spec);
if (result == 0) {
*image_spec = policy->image_spec;
@@ -370,4 +140,3 @@
{
return (io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID) == 0);
}
-
diff --git a/plat/arm/common/fconf/arm_fconf_io.c b/plat/arm/common/fconf/arm_fconf_io.c
index 017af79..6ebc467 100644
--- a/plat/arm/common/fconf/arm_fconf_io.c
+++ b/plat/arm/common/fconf/arm_fconf_io.c
@@ -25,8 +25,31 @@
const io_uuid_spec_t arm_uuid_spec[MAX_NUMBER_IDS] = {
[BL2_IMAGE_ID] = {UUID_TRUSTED_BOOT_FIRMWARE_BL2},
[TB_FW_CONFIG_ID] = {UUID_TB_FW_CONFIG},
+#if !ARM_IO_IN_DTB
+ [SCP_BL2_IMAGE_ID] = {UUID_SCP_FIRMWARE_SCP_BL2},
+ [BL31_IMAGE_ID] = {UUID_EL3_RUNTIME_FIRMWARE_BL31},
+ [BL32_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32},
+ [BL32_EXTRA1_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32_EXTRA1},
+ [BL32_EXTRA2_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32_EXTRA2},
+ [BL33_IMAGE_ID] = {UUID_NON_TRUSTED_FIRMWARE_BL33},
+ [HW_CONFIG_ID] = {UUID_HW_CONFIG},
+ [SOC_FW_CONFIG_ID] = {UUID_SOC_FW_CONFIG},
+ [TOS_FW_CONFIG_ID] = {UUID_TOS_FW_CONFIG},
+ [NT_FW_CONFIG_ID] = {UUID_NT_FW_CONFIG},
+#endif /* ARM_IO_IN_DTB */
#if TRUSTED_BOARD_BOOT
[TRUSTED_BOOT_FW_CERT_ID] = {UUID_TRUSTED_BOOT_FW_CERT},
+#if !ARM_IO_IN_DTB
+ [TRUSTED_KEY_CERT_ID] = {UUID_TRUSTED_KEY_CERT},
+ [SCP_FW_KEY_CERT_ID] = {UUID_SCP_FW_KEY_CERT},
+ [SOC_FW_KEY_CERT_ID] = {UUID_SOC_FW_KEY_CERT},
+ [TRUSTED_OS_FW_KEY_CERT_ID] = {UUID_TRUSTED_OS_FW_KEY_CERT},
+ [NON_TRUSTED_FW_KEY_CERT_ID] = {UUID_NON_TRUSTED_FW_KEY_CERT},
+ [SCP_FW_CONTENT_CERT_ID] = {UUID_SCP_FW_CONTENT_CERT},
+ [SOC_FW_CONTENT_CERT_ID] = {UUID_SOC_FW_CONTENT_CERT},
+ [TRUSTED_OS_FW_CONTENT_CERT_ID] = {UUID_TRUSTED_OS_FW_CONTENT_CERT},
+ [NON_TRUSTED_FW_CONTENT_CERT_ID] = {UUID_NON_TRUSTED_FW_CONTENT_CERT},
+#endif /* ARM_IO_IN_DTB */
#endif /* TRUSTED_BOARD_BOOT */
};
@@ -47,12 +70,111 @@
(uintptr_t)&arm_uuid_spec[TB_FW_CONFIG_ID],
open_fip
},
+#if !ARM_IO_IN_DTB
+ [SCP_BL2_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SCP_BL2_IMAGE_ID],
+ open_fip
+ },
+ [BL31_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[BL31_IMAGE_ID],
+ open_fip
+ },
+ [BL32_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[BL32_IMAGE_ID],
+ open_fip
+ },
+ [BL32_EXTRA1_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[BL32_EXTRA1_IMAGE_ID],
+ open_fip
+ },
+ [BL32_EXTRA2_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[BL32_EXTRA2_IMAGE_ID],
+ open_fip
+ },
+ [BL33_IMAGE_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[BL33_IMAGE_ID],
+ open_fip
+ },
+ [HW_CONFIG_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[HW_CONFIG_ID],
+ open_fip
+ },
+ [SOC_FW_CONFIG_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SOC_FW_CONFIG_ID],
+ open_fip
+ },
+ [TOS_FW_CONFIG_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[TOS_FW_CONFIG_ID],
+ open_fip
+ },
+ [NT_FW_CONFIG_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[NT_FW_CONFIG_ID],
+ open_fip
+ },
+#endif /* ARM_IO_IN_DTB */
#if TRUSTED_BOARD_BOOT
[TRUSTED_BOOT_FW_CERT_ID] = {
&fip_dev_handle,
(uintptr_t)&arm_uuid_spec[TRUSTED_BOOT_FW_CERT_ID],
open_fip
},
+#if !ARM_IO_IN_DTB
+ [TRUSTED_KEY_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[TRUSTED_KEY_CERT_ID],
+ open_fip
+ },
+ [SCP_FW_KEY_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SCP_FW_KEY_CERT_ID],
+ open_fip
+ },
+ [SOC_FW_KEY_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SOC_FW_KEY_CERT_ID],
+ open_fip
+ },
+ [TRUSTED_OS_FW_KEY_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[TRUSTED_OS_FW_KEY_CERT_ID],
+ open_fip
+ },
+ [NON_TRUSTED_FW_KEY_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[NON_TRUSTED_FW_KEY_CERT_ID],
+ open_fip
+ },
+ [SCP_FW_CONTENT_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SCP_FW_CONTENT_CERT_ID],
+ open_fip
+ },
+ [SOC_FW_CONTENT_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[SOC_FW_CONTENT_CERT_ID],
+ open_fip
+ },
+ [TRUSTED_OS_FW_CONTENT_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[TRUSTED_OS_FW_CONTENT_CERT_ID],
+ open_fip
+ },
+ [NON_TRUSTED_FW_CONTENT_CERT_ID] = {
+ &fip_dev_handle,
+ (uintptr_t)&arm_uuid_spec[NON_TRUSTED_FW_CONTENT_CERT_ID],
+ open_fip
+ },
+#endif /* ARM_IO_IN_DTB */
#endif /* TRUSTED_BOARD_BOOT */
};
@@ -138,6 +260,8 @@
return 0;
}
+#if ARM_IO_IN_DTB
FCONF_REGISTER_POPULATOR(TB_FW, arm_io, fconf_populate_arm_io_policies);
+#endif /* ARM_IO_IN_DTB */
#endif /* IMAGE_BL2 */
diff --git a/plat/arm/css/sgi/include/sgi_base_platform_def.h b/plat/arm/css/sgi/include/sgi_base_platform_def.h
index 305fcf6..8c8b231 100644
--- a/plat/arm/css/sgi/include/sgi_base_platform_def.h
+++ b/plat/arm/css/sgi/include/sgi_base_platform_def.h
@@ -56,7 +56,7 @@
* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
* plus a little space for growth.
*/
-#define PLAT_ARM_MAX_BL1_RW_SIZE 0xB000
+#define PLAT_ARM_MAX_BL1_RW_SIZE 0xC000
/*
* PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page