commit 48cbe85414229423112d401aab169fc68cce9f5b
author Sandrine Bailleux <sandrine.bailleux@arm.com> Thu Apr 14 14:18:07 2016 +0100
committer Sandrine Bailleux <sandrine.bailleux@arm.com> Thu Apr 21 12:59:59 2016 +0100
tree 5cfd8b9ca56e339523439f2a07497637d77c480e
parent c11116fe761f55b7d3333193f5095968517447d9

Add support for Cortex-A57 erratum 829520 workaround

Change-Id: Ia2ce8aa752efb090cfc734c1895c8f2539e82439

include/lib/cpus/aarch64/cortex_a57.h

diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h
index 68d0821..95c1f56 100644
--- a/include/lib/cpus/aarch64/cortex_a57.h
+++ b/include/lib/cpus/aarch64/cortex_a57.h
@@ -67,6 +67,7 @@
 #define CPUACTLR_DCC_AS_DCCI		(1 << 44)
 #define CPUACTLR_DIS_STREAMING		(3 << 27)
 #define CPUACTLR_DIS_L1_STREAMING	(3 << 25)
+#define CPUACTLR_DIS_INDIRECT_PREDICTOR	(1 << 4)
 
 /*******************************************************************************
  * L2 Control register specific definitions.