Merge pull request #880 from Summer-ARM/sq/tcr-memory-attribution
Add support to change xlat_tables to non-cacheable
diff --git a/Makefile b/Makefile
index 782c489..83650a8 100644
--- a/Makefile
+++ b/Makefile
@@ -171,6 +171,7 @@
common/${ARCH}/debug.S \
lib/${ARCH}/cache_helpers.S \
lib/${ARCH}/misc_helpers.S \
+ plat/common/${ARCH}/plat_common.c \
plat/common/${ARCH}/platform_helpers.S \
${STDLIB_SRCS}
diff --git a/bl1/bl1.mk b/bl1/bl1.mk
index 45ad01e..3f3bedb 100644
--- a/bl1/bl1.mk
+++ b/bl1/bl1.mk
@@ -36,8 +36,8 @@
lib/cpus/${ARCH}/cpu_helpers.S \
lib/cpus/errata_report.c \
lib/el3_runtime/${ARCH}/context_mgmt.c \
- plat/common/plat_bl1_common.c
-
+ plat/common/plat_bl1_common.c \
+ plat/common/${ARCH}/platform_up_stack.S
ifeq (${ARCH},aarch64)
BL1_SOURCES += lib/el3_runtime/aarch64/context.S
diff --git a/bl2/bl2.mk b/bl2/bl2.mk
index f823ef4..27673b3 100644
--- a/bl2/bl2.mk
+++ b/bl2/bl2.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -31,7 +31,8 @@
BL2_SOURCES += bl2/bl2_main.c \
bl2/${ARCH}/bl2_entrypoint.S \
bl2/${ARCH}/bl2_arch_setup.c \
- lib/locks/exclusive/${ARCH}/spinlock.S
+ lib/locks/exclusive/${ARCH}/spinlock.S \
+ plat/common/${ARCH}/platform_up_stack.S
ifeq (${ARCH},aarch64)
BL2_SOURCES += common/aarch64/early_exceptions.S
diff --git a/bl2u/bl2u.mk b/bl2u/bl2u.mk
index aa9de54..ef70bb2 100644
--- a/bl2u/bl2u.mk
+++ b/bl2u/bl2u.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,7 @@
BL2U_SOURCES += bl2u/bl2u_main.c \
bl2u/aarch64/bl2u_entrypoint.S \
- common/aarch64/early_exceptions.S
+ common/aarch64/early_exceptions.S \
+ plat/common/aarch64/platform_up_stack.S
BL2U_LINKERFILE := bl2u/bl2u.ld.S
diff --git a/bl31/bl31.mk b/bl31/bl31.mk
index 4de511b..c89ebc0 100644
--- a/bl31/bl31.mk
+++ b/bl31/bl31.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -37,6 +37,7 @@
bl31/aarch64/crash_reporting.S \
bl31/bl31_context_mgmt.c \
common/runtime_svc.c \
+ plat/common/aarch64/platform_mp_stack.S \
services/std_svc/std_svc_setup.c \
${PSCI_LIB_SOURCES}
diff --git a/docs/firmware-design.md b/docs/firmware-design.md
index 523fa55..45e56e6 100644
--- a/docs/firmware-design.md
+++ b/docs/firmware-design.md
@@ -1752,7 +1752,7 @@
`name`: The name of the ToC. This is currently used to validate the header.
`serial_number`: A non-zero number provided by the creation tool
`flags`: Flags associated with this data.
- Bits 0-13: Reserved
+ Bits 0-31: Reserved
Bits 32-47: Platform defined
Bits 48-63: Reserved
diff --git a/docs/user-guide.md b/docs/user-guide.md
index c6c8e19..2770b2c 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -197,6 +197,12 @@
by the interrupt management framework. Default is 2 (that is, version 2.0).
This build option is deprecated.
+* `ARM_PLAT_MT`: This flag determines whether the ARM platform layer has to
+ cater for the multi-threading `MT` bit when accessing MPIDR. When this
+ flag is set, the functions which deal with MPIDR assume that the `MT` bit
+ in MPIDR is set and access the bit-fields in MPIDR accordingly. Default
+ value of this flag is 0.
+
* `ASM_ASSERTION`: This flag determines whether the assertion checks within
assembly source files are enabled or not. This option defaults to the
value of `DEBUG` - that is, by default this is only enabled for a debug
diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h
index bc492b2..234ceeb 100644
--- a/include/lib/aarch32/arch.h
+++ b/include/lib/aarch32/arch.h
@@ -46,6 +46,7 @@
/*******************************************************************************
* MPIDR macros
******************************************************************************/
+#define MPIDR_MT_MASK (1 << 24)
#define MPIDR_CPU_MASK MPIDR_AFFLVL_MASK
#define MPIDR_CLUSTER_MASK (MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS)
#define MPIDR_AFFINITY_BITS 8
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index f1ad9bb..a2c736c 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -50,6 +50,7 @@
/*******************************************************************************
* MPIDR macros
******************************************************************************/
+#define MPIDR_MT_MASK (1 << 24)
#define MPIDR_CPU_MASK MPIDR_AFFLVL_MASK
#define MPIDR_CLUSTER_MASK MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS
#define MPIDR_AFFINITY_BITS 8
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index 0b57ba8..b24af78 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -203,6 +203,10 @@
void plat_arm_interconnect_enter_coherency(void);
void plat_arm_interconnect_exit_coherency(void);
+#if ARM_PLAT_MT
+unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
+#endif
+
#if LOAD_IMAGE_V2
/*
* This function is called after loading SCP_BL2 image and it is used to perform
diff --git a/lib/aarch32/cache_helpers.S b/lib/aarch32/cache_helpers.S
index d0e5cd0..b17b903 100644
--- a/lib/aarch32/cache_helpers.S
+++ b/lib/aarch32/cache_helpers.S
@@ -118,7 +118,7 @@
mov r12, r2, LSR r10 // extract cache type bits from clidr
and r12, r12, #7 // mask the bits for current cache only
cmp r12, #2 // see what cache we have at this level
- blt level_done // no cache or only instruction cache at this level
+ blo level_done // no cache or only instruction cache at this level
stcopr r1, CSSELR // select current cache level in csselr
isb // isb to sych the new cssr&csidr
@@ -138,14 +138,14 @@
blx r6
subs r7, r7, #1 // decrement the set number
- bge loop3
+ bhs loop3
subs r9, r9, #1 // decrement the way number
- bge loop2
+ bhs loop2
level_done:
add r1, r1, #2 // increment the cache number
cmp r3, r1
dsb sy // ensure completion of previous cache maintenance instruction
- bgt loop1
+ bhi loop1
mov r6, #0
stcopr r6, CSSELR //select cache level 0 in csselr
diff --git a/lib/aarch32/misc_helpers.S b/lib/aarch32/misc_helpers.S
index dc84799..5b17c21 100644
--- a/lib/aarch32/misc_helpers.S
+++ b/lib/aarch32/misc_helpers.S
@@ -170,7 +170,7 @@
/* copy 4 bytes at a time */
m_loop4:
cmp r2, #4
- blt m_loop1
+ blo m_loop1
ldr r3, [r1], #4
str r3, [r0], #4
sub r2, r2, #4
diff --git a/lib/aarch64/cache_helpers.S b/lib/aarch64/cache_helpers.S
index 476b906..acafea7 100644
--- a/lib/aarch64/cache_helpers.S
+++ b/lib/aarch64/cache_helpers.S
@@ -119,7 +119,7 @@
lsr x1, x0, x2 // extract cache type bits from clidr
and x1, x1, #7 // mask the bits for current cache only
cmp x1, #2 // see what cache we have at this level
- b.lt level_done // nothing to do if no cache or icache
+ b.lo level_done // nothing to do if no cache or icache
msr csselr_el1, x10 // select current cache level in csselr
isb // isb to sych the new cssr&csidr
@@ -144,10 +144,10 @@
orr w11, w9, w7 // combine cache, way and set number
dc \_op, x11
subs w7, w7, w17 // decrement set number
- b.ge loop3_\_op
+ b.hs loop3_\_op
subs x9, x9, x16 // decrement way number
- b.ge loop2_\_op
+ b.hs loop2_\_op
b level_done
.endm
@@ -155,7 +155,7 @@
level_done:
add x10, x10, #2 // increment cache number
cmp x3, x10
- b.gt loop1
+ b.hi loop1
msr csselr_el1, xzr // select cache level 0 in csselr
dsb sy // barrier to complete final cache operation
isb
diff --git a/lib/cpus/aarch32/cpu_helpers.S b/lib/cpus/aarch32/cpu_helpers.S
index c41978e..dc1b6e6 100644
--- a/lib/cpus/aarch32/cpu_helpers.S
+++ b/lib/cpus/aarch32/cpu_helpers.S
@@ -157,7 +157,7 @@
1:
/* Check if we have reached end of list */
cmp r4, r5
- bge error_exit
+ bhs error_exit
/* load the midr from the cpu_ops */
ldr r1, [r4], #CPU_OPS_SIZE
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 3156f08..891e2fb 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -90,6 +90,11 @@
$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
$(eval $(call add_define,ARM_BL31_IN_DRAM))
+# Process ARM_PLAT_MT flag
+ARM_PLAT_MT := 0
+$(eval $(call assert_boolean,ARM_PLAT_MT))
+$(eval $(call add_define,ARM_PLAT_MT))
+
# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
ENABLE_PSCI_STAT := 1
ENABLE_PMF := 1
@@ -112,16 +117,14 @@
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} \
plat/arm/common/${ARCH}/arm_helpers.S \
- plat/arm/common/arm_common.c \
- plat/common/${ARCH}/plat_common.c
+ plat/arm/common/arm_common.c
BL1_SOURCES += drivers/arm/sp805/sp805.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
drivers/io/io_storage.c \
plat/arm/common/arm_bl1_setup.c \
- plat/arm/common/arm_io_storage.c \
- plat/common/${ARCH}/platform_up_stack.S
+ plat/arm/common/arm_io_storage.c
ifdef EL3_PAYLOAD_BASE
# Need the arm_program_trusted_mailbox() function to release secondary CPUs from
# their holding pen
@@ -132,21 +135,18 @@
drivers/io/io_memmap.c \
drivers/io/io_storage.c \
plat/arm/common/arm_bl2_setup.c \
- plat/arm/common/arm_io_storage.c \
- plat/common/${ARCH}/platform_up_stack.S
+ plat/arm/common/arm_io_storage.c
ifeq (${LOAD_IMAGE_V2},1)
BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c\
plat/arm/common/arm_image_load.c \
common/desc_image_load.c
endif
-BL2U_SOURCES += plat/arm/common/arm_bl2u_setup.c \
- plat/common/aarch64/platform_up_stack.S
+BL2U_SOURCES += plat/arm/common/arm_bl2u_setup.c
BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
plat/arm/common/arm_pm.c \
plat/arm/common/arm_topology.c \
- plat/common/aarch64/platform_mp_stack.S \
plat/common/plat_psci_common.c
ifeq (${ENABLE_PMF}, 1)
diff --git a/plat/arm/common/arm_topology.c b/plat/arm/common/arm_topology.c
index 4430b13..3c95263 100644
--- a/plat/arm/common/arm_topology.c
+++ b/plat/arm/common/arm_topology.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -40,14 +40,26 @@
int arm_check_mpidr(u_register_t mpidr)
{
unsigned int cluster_id, cpu_id;
+ uint64_t valid_mask;
- mpidr &= MPIDR_AFFINITY_MASK;
-
- if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
- return -1;
+#if ARM_PLAT_MT
+ unsigned int pe_id;
+ valid_mask = ~(MPIDR_AFFLVL_MASK |
+ (MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) |
+ (MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT));
+ cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
+ cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
+ pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
+#else
+ valid_mask = ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK);
cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
+#endif /* ARM_PLAT_MT */
+
+ mpidr &= MPIDR_AFFINITY_MASK;
+ if (mpidr & valid_mask)
+ return -1;
if (cluster_id >= PLAT_ARM_CLUSTER_COUNT)
return -1;
@@ -57,5 +69,10 @@
if (cpu_id >= plat_arm_get_cluster_core_count(mpidr))
return -1;
+#if ARM_PLAT_MT
+ if (pe_id >= plat_arm_get_cpu_pe_count(mpidr))
+ return -1;
+#endif /* ARM_PLAT_MT */
+
return 0;
}
diff --git a/plat/arm/css/common/css_topology.c b/plat/arm/css/common/css_topology.c
index d5f0275..9c86f89 100644
--- a/plat/arm/css/common/css_topology.c
+++ b/plat/arm/css/common/css_topology.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,10 @@
#include <plat_arm.h>
+#if ARM_PLAT_MT
+#pragma weak plat_arm_get_cpu_pe_count
+#endif
+
/******************************************************************************
* This function implements a part of the critical interface between the psci
* generic layer and the platform that allows the former to query the platform
@@ -43,3 +47,14 @@
return -1;
}
+
+#if ARM_PLAT_MT
+/******************************************************************************
+ * This function returns the PE count within the physical cpu corresponding to
+ * `mpidr`. Now one cpu only have one thread, so just return 1.
+ *****************************************************************************/
+unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
+{
+ return 1;
+}
+#endif /* ARM_PLAT_MT */
diff --git a/plat/arm/css/drivers/scpi/css_scpi.c b/plat/arm/css/drivers/scpi/css_scpi.c
index 65ae978..7c5c578 100644
--- a/plat/arm/css/drivers/scpi/css_scpi.c
+++ b/plat/arm/css/drivers/scpi/css_scpi.c
@@ -150,8 +150,18 @@
uint32_t state = 0;
uint32_t *payload_addr;
+#if ARM_PLAT_MT
+ /*
+ * The current SCPI driver only caters for single-threaded platforms.
+ * Hence we ignore the thread ID (which is always 0) for such platforms.
+ */
+ state |= (mpidr >> MPIDR_AFF1_SHIFT) & 0x0f; /* CPU ID */
+ state |= ((mpidr >> MPIDR_AFF2_SHIFT) & 0x0f) << 4; /* Cluster ID */
+#else
state |= mpidr & 0x0f; /* CPU ID */
state |= (mpidr & 0xf00) >> 4; /* Cluster ID */
+#endif /* ARM_PLAT_MT */
+
state |= cpu_state << 8;
state |= cluster_state << 12;
state |= css_state << 16;
diff --git a/plat/common/aarch32/platform_up_stack.S b/plat/common/aarch32/platform_up_stack.S
index 8275aec..e36d063 100644
--- a/plat/common/aarch32/platform_up_stack.S
+++ b/plat/common/aarch32/platform_up_stack.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -32,8 +32,8 @@
#include <asm_macros.S>
#include <platform_def.h>
- .globl plat_get_my_stack
- .globl plat_set_my_stack
+ .weak plat_get_my_stack
+ .weak plat_set_my_stack
/* -----------------------------------------------------
* unsigned long plat_get_my_stack ()
diff --git a/plat/common/aarch64/platform_up_stack.S b/plat/common/aarch64/platform_up_stack.S
index 5b82630..93489e9 100644
--- a/plat/common/aarch64/platform_up_stack.S
+++ b/plat/common/aarch64/platform_up_stack.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -34,10 +34,10 @@
.local platform_normal_stacks
- .globl plat_set_my_stack
- .globl plat_get_my_stack
- .globl platform_set_stack
- .globl platform_get_stack
+ .weak plat_set_my_stack
+ .weak plat_get_my_stack
+ .weak platform_set_stack
+ .weak platform_get_stack
/* -----------------------------------------------------
* uintptr_t plat_get_my_stack ()
diff --git a/plat/mediatek/mt6795/platform.mk b/plat/mediatek/mt6795/platform.mk
index e105dfe..9851442 100644
--- a/plat/mediatek/mt6795/platform.mk
+++ b/plat/mediatek/mt6795/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -51,7 +51,6 @@
${OEMS_INCLUDES}
PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \
- plat/common/aarch64/plat_common.c \
plat/common/plat_gic.c
BL31_SOURCES += drivers/arm/cci/cci.c \
@@ -63,7 +62,6 @@
drivers/console/console.S \
drivers/delay_timer/delay_timer.c \
lib/cpus/aarch64/cortex_a53.S \
- plat/common/aarch64/platform_mp_stack.S \
${MTK_PLAT_SOC}/bl31_plat_setup.c \
${MTK_PLAT_SOC}/plat_mt_gic.c \
${MTK_PLAT}/common/mtk_sip_svc.c \
diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk
index 9583efe..ad27749 100644
--- a/plat/mediatek/mt8173/platform.mk
+++ b/plat/mediatek/mt8173/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -45,7 +45,6 @@
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
- plat/common/aarch64/plat_common.c \
plat/arm/common/arm_gicv2.c \
plat/common/plat_gicv2.c
@@ -60,7 +59,6 @@
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
- plat/common/aarch64/platform_mp_stack.S \
${MTK_PLAT}/common/drivers/uart/8250_console.S \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/mtk_sip_svc.c \
diff --git a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
index 70a7f3a..308753e 100644
--- a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
+++ b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
@@ -289,7 +289,7 @@
mov x2, #BL31_SIZE
_loop16:
cmp x2, #16
- b.lt _loop1
+ b.lo _loop1
ldp x3, x4, [x1], #16
stp x3, x4, [x0], #16
sub x2, x2, #16
diff --git a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
index e11b8ad..f020204 100644
--- a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
+++ b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
@@ -392,8 +392,8 @@
/* Extract the high address bits from the base/end values */
val = (uint32_t)(phys_base >> 32) & TZRAM_ADDR_HI_BITS_MASK;
- val |= (((uint32_t)(tzram_end >> 32) << TZRAM_END_HI_BITS_SHIFT) &
- TZRAM_ADDR_HI_BITS_MASK);
+ val |= (((uint32_t)(tzram_end >> 32) & TZRAM_ADDR_HI_BITS_MASK) <<
+ TZRAM_END_HI_BITS_SHIFT);
tegra_mc_write_32(MC_TZRAM_HI_ADDR_BITS, val);
/* Disable further writes to the TZRAM setup registers */
diff --git a/plat/nvidia/tegra/common/tegra_common.mk b/plat/nvidia/tegra/common/tegra_common.mk
index 3617396..d6bd2ea 100644
--- a/plat/nvidia/tegra/common/tegra_common.mk
+++ b/plat/nvidia/tegra/common/tegra_common.mk
@@ -43,8 +43,7 @@
-Iplat/nvidia/tegra/include/${TARGET_SOC}
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
- lib/xlat_tables/aarch64/xlat_tables.c \
- plat/common/aarch64/plat_common.c
+ lib/xlat_tables/aarch64/xlat_tables.c
COMMON_DIR := plat/nvidia/tegra/common
@@ -52,7 +51,6 @@
drivers/console/aarch64/console.S \
drivers/delay_timer/delay_timer.c \
drivers/ti/uart/aarch64/16550_console.S \
- plat/common/aarch64/platform_mp_stack.S \
${COMMON_DIR}/aarch64/tegra_helpers.S \
${COMMON_DIR}/drivers/pmc/pmc.c \
${COMMON_DIR}/tegra_bl31_setup.c \
diff --git a/plat/qemu/platform.mk b/plat/qemu/platform.mk
index aa08bd3..63720f4 100644
--- a/plat/qemu/platform.mk
+++ b/plat/qemu/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -51,7 +51,6 @@
lib/cpus/aarch64/aem_generic.S \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
- plat/common/aarch64/platform_mp_stack.S \
plat/qemu/aarch64/plat_helpers.S \
plat/qemu/qemu_bl1_setup.c
@@ -59,7 +58,6 @@
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
- plat/common/aarch64/platform_mp_stack.S \
lib/semihosting/semihosting.c \
lib/semihosting/aarch64/semihosting_call.S\
plat/qemu/qemu_io_storage.c \
@@ -74,9 +72,7 @@
drivers/arm/gic/v2/gicv2_helpers.c \
drivers/arm/gic/v2/gicv2_main.c \
drivers/arm/gic/common/gic_common.c \
- plat/common/aarch64/platform_mp_stack.S \
plat/common/aarch64/plat_psci_common.c \
- plat/common/aarch64/plat_common.c \
plat/qemu/qemu_pm.c \
plat/qemu/topology.c \
plat/qemu/aarch64/plat_helpers.S \
diff --git a/plat/rockchip/rk3368/platform.mk b/plat/rockchip/rk3368/platform.mk
index 73a56e3..4320446 100644
--- a/plat/rockchip/rk3368/platform.mk
+++ b/plat/rockchip/rk3368/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -50,7 +50,6 @@
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
- plat/common/aarch64/plat_common.c \
plat/common/plat_psci_common.c
BL31_SOURCES += ${RK_GIC_SOURCES} \
@@ -60,7 +59,6 @@
drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
lib/cpus/aarch64/cortex_a53.S \
- plat/common/aarch64/platform_mp_stack.S \
${RK_PLAT_COMMON}/aarch64/plat_helpers.S \
${RK_PLAT_COMMON}/bl31_plat_setup.c \
${RK_PLAT_COMMON}/params_setup.c \
diff --git a/plat/rockchip/rk3399/platform.mk b/plat/rockchip/rk3399/platform.mk
index c72119c..308a5cb 100644
--- a/plat/rockchip/rk3399/platform.mk
+++ b/plat/rockchip/rk3399/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -53,7 +53,6 @@
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
lib/xlat_tables/aarch64/xlat_tables.c \
- plat/common/aarch64/plat_common.c \
plat/common/plat_psci_common.c
BL31_SOURCES += ${RK_GIC_SOURCES} \
@@ -65,7 +64,6 @@
drivers/gpio/gpio.c \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a72.S \
- plat/common/aarch64/platform_mp_stack.S \
${RK_PLAT_COMMON}/aarch64/plat_helpers.S \
${RK_PLAT_COMMON}/bl31_plat_setup.c \
${RK_PLAT_COMMON}/params_setup.c \
diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk
index d00b694..9d612dc 100644
--- a/plat/xilinx/zynqmp/platform.mk
+++ b/plat/xilinx/zynqmp/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
@@ -78,7 +78,6 @@
plat/arm/common/arm_common.c \
plat/arm/common/arm_gicv2.c \
plat/common/plat_gicv2.c \
- plat/common/aarch64/plat_common.c \
plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -86,7 +85,6 @@
lib/cpus/aarch64/aem_generic.S \
lib/cpus/aarch64/cortex_a53.S \
plat/common/plat_psci_common.c \
- plat/common/aarch64/platform_mp_stack.S \
plat/xilinx/zynqmp/bl31_zynqmp_setup.c \
plat/xilinx/zynqmp/plat_psci.c \
plat/xilinx/zynqmp/plat_zynqmp.c \