diff --git a/drivers/renesas/common/pwrc/pwrc.c b/drivers/renesas/common/pwrc/pwrc.c
index 4e175eb..b60ccab 100644
--- a/drivers/renesas/common/pwrc/pwrc.c
+++ b/drivers/renesas/common/pwrc/pwrc.c
@@ -156,7 +156,7 @@
 IMPORT_SYM(unsigned long, __SRAM_COPY_START__, SRAM_COPY_START);
 #endif
 
-uint32_t rcar_pwrc_status(uint64_t mpidr)
+uint32_t rcar_pwrc_status(u_register_t mpidr)
 {
 	uint32_t ret = 0;
 	uint64_t cm, cpu;
@@ -188,7 +188,7 @@
 	return ret;
 }
 
-static void scu_power_up(uint64_t mpidr)
+static void scu_power_up(u_register_t mpidr)
 {
 	uintptr_t reg_pwrsr, reg_cpumcr, reg_pwron, reg_pwrer;
 	uint32_t c, sysc_reg_bit;
@@ -243,7 +243,7 @@
 		;
 }
 
-void rcar_pwrc_cpuon(uint64_t mpidr)
+void rcar_pwrc_cpuon(u_register_t mpidr)
 {
 	uint32_t res_data, on_data;
 	uintptr_t res_reg, on_reg;
@@ -268,7 +268,7 @@
 	rcar_lock_release();
 }
 
-void rcar_pwrc_cpuoff(uint64_t mpidr)
+void rcar_pwrc_cpuoff(u_register_t mpidr)
 {
 	uint32_t c;
 	uintptr_t reg;
@@ -289,7 +289,7 @@
 	rcar_lock_release();
 }
 
-void rcar_pwrc_enable_interrupt_wakeup(uint64_t mpidr)
+void rcar_pwrc_enable_interrupt_wakeup(u_register_t mpidr)
 {
 	uint32_t c, shift_irq, shift_fiq;
 	uintptr_t reg;
@@ -304,12 +304,12 @@
 	shift_irq = WUP_IRQ_SHIFT + cpu;
 	shift_fiq = WUP_FIQ_SHIFT + cpu;
 
-	mmio_write_32(reg, ~((uint32_t) 1 << shift_irq) &
-		      ~((uint32_t) 1 << shift_fiq));
+	mmio_clrbits_32(reg, ((uint32_t) 1 << shift_irq) |
+		      ((uint32_t) 1 << shift_fiq));
 	rcar_lock_release();
 }
 
-void rcar_pwrc_disable_interrupt_wakeup(uint64_t mpidr)
+void rcar_pwrc_disable_interrupt_wakeup(u_register_t mpidr)
 {
 	uint32_t c, shift_irq, shift_fiq;
 	uintptr_t reg;
@@ -324,12 +324,35 @@
 	shift_irq = WUP_IRQ_SHIFT + cpu;
 	shift_fiq = WUP_FIQ_SHIFT + cpu;
 
-	mmio_write_32(reg, ((uint32_t) 1 << shift_irq) |
+	mmio_setbits_32(reg, ((uint32_t) 1 << shift_irq) |
 		      ((uint32_t) 1 << shift_fiq));
 	rcar_lock_release();
 }
 
+void rcar_pwrc_all_disable_interrupt_wakeup(void)
+{
+	uint32_t cpu_num;
+	u_register_t cl, cpu, mpidr;
+
+	const uint32_t cluster[PLATFORM_CLUSTER_COUNT] = {
+		RCAR_CLUSTER_CA57,
+		RCAR_CLUSTER_CA53
+	};
+
+	for (cl = 0; cl < PLATFORM_CLUSTER_COUNT; cl++) {
+		cpu_num = rcar_pwrc_get_cpu_num(cluster[cl]);
+		for (cpu = 0; cpu < cpu_num; cpu++) {
+			mpidr = ((cl << MPIDR_AFFINITY_BITS) | cpu);
+			if (mpidr == rcar_boot_mpidr) {
+				rcar_pwrc_enable_interrupt_wakeup(mpidr);
+			} else {
+				rcar_pwrc_disable_interrupt_wakeup(mpidr);
+			}
+		}
+	}
+}
+
-void rcar_pwrc_clusteroff(uint64_t mpidr)
+void rcar_pwrc_clusteroff(u_register_t mpidr)
 {
 	uint32_t c, product, cut, reg;
 	uintptr_t dst;
@@ -801,7 +824,7 @@
 	return RCAR_CLUSTER_A53A57;
 }
 
-uint32_t rcar_pwrc_get_mpidr_cluster(uint64_t mpidr)
+uint32_t rcar_pwrc_get_mpidr_cluster(u_register_t mpidr)
 {
 	uint32_t c = rcar_pwrc_get_cluster();
 
@@ -854,7 +877,7 @@
 }
 #endif
 
-int32_t rcar_pwrc_cpu_on_check(uint64_t mpidr)
+int32_t rcar_pwrc_cpu_on_check(u_register_t mpidr)
 {
 	uint64_t i;
 	uint64_t j;
diff --git a/drivers/renesas/common/pwrc/pwrc.h b/drivers/renesas/common/pwrc/pwrc.h
index f73099b..eefa62f 100644
--- a/drivers/renesas/common/pwrc/pwrc.h
+++ b/drivers/renesas/common/pwrc/pwrc.h
@@ -38,19 +38,22 @@
 #define RCAR_CLUSTER_CA53	(1U)
 #define RCAR_CLUSTER_CA57	(2U)
 
+extern u_register_t rcar_boot_mpidr;
+
 #ifndef __ASSEMBLER__
-void rcar_pwrc_disable_interrupt_wakeup(uint64_t mpidr);
-void rcar_pwrc_enable_interrupt_wakeup(uint64_t mpidr);
-void rcar_pwrc_clusteroff(uint64_t mpidr);
-void rcar_pwrc_cpuoff(uint64_t mpidr);
-void rcar_pwrc_cpuon(uint64_t mpidr);
-int32_t rcar_pwrc_cpu_on_check(uint64_t mpidr);
+void rcar_pwrc_disable_interrupt_wakeup(u_register_t mpidr);
+void rcar_pwrc_enable_interrupt_wakeup(u_register_t mpidr);
+void rcar_pwrc_all_disable_interrupt_wakeup(void);
+void rcar_pwrc_clusteroff(u_register_t mpidr);
+void rcar_pwrc_cpuoff(u_register_t mpidr);
+void rcar_pwrc_cpuon(u_register_t mpidr);
+int32_t rcar_pwrc_cpu_on_check(u_register_t mpidr);
 void rcar_pwrc_setup(void);
 
-uint32_t rcar_pwrc_get_cpu_wkr(uint64_t mpidr);
-uint32_t rcar_pwrc_status(uint64_t mpidr);
+uint32_t rcar_pwrc_get_cpu_wkr(u_register_t mpidr);
+uint32_t rcar_pwrc_status(u_register_t mpidr);
 uint32_t rcar_pwrc_get_cluster(void);
-uint32_t rcar_pwrc_get_mpidr_cluster(uint64_t mpidr);
+uint32_t rcar_pwrc_get_mpidr_cluster(u_register_t mpidr);
 uint32_t rcar_pwrc_get_cpu_num(uint32_t cluster_type);
 void rcar_pwrc_restore_timer_state(void);
 void plat_secondary_reset(void);
diff --git a/plat/renesas/common/bl31_plat_setup.c b/plat/renesas/common/bl31_plat_setup.c
index 93798ac..60960d4 100644
--- a/plat/renesas/common/bl31_plat_setup.c
+++ b/plat/renesas/common/bl31_plat_setup.c
@@ -129,4 +129,5 @@
 	 * functions
 	 */
 	rcar_boot_mpidr = read_mpidr_el1() & 0x0000ffffU;
+	rcar_pwrc_all_disable_interrupt_wakeup();
 }
diff --git a/plat/renesas/common/include/rcar_version.h b/plat/renesas/common/include/rcar_version.h
index 173111d..5a0ca31 100644
--- a/plat/renesas/common/include/rcar_version.h
+++ b/plat/renesas/common/include/rcar_version.h
@@ -9,7 +9,7 @@
 
 #include <arch_helpers.h>
 
-#define VERSION_OF_RENESAS		"3.0.0"
+#define VERSION_OF_RENESAS		"3.0.3"
 #define VERSION_OF_RENESAS_MAXLEN	128
 
 extern const uint8_t version_of_renesas[VERSION_OF_RENESAS_MAXLEN];
diff --git a/plat/renesas/common/plat_pm.c b/plat/renesas/common/plat_pm.c
index 1d4a7f6..cc677f3 100644
--- a/plat/renesas/common/plat_pm.c
+++ b/plat/renesas/common/plat_pm.c
@@ -39,11 +39,10 @@
 extern void rcar_pwrc_restore_generic_timer(uint64_t *stack);
 extern void plat_rcar_gic_driver_init(void);
 extern void plat_rcar_gic_init(void);
-extern u_register_t rcar_boot_mpidr;
 
 static uintptr_t rcar_sec_entrypoint;
 
-static void rcar_program_mailbox(uint64_t mpidr, uint64_t address)
+static void rcar_program_mailbox(u_register_t mpidr, uintptr_t address)
 {
 	mailbox_t *rcar_mboxes = (mailbox_t *) MBOX_BASE;
 	uint64_t linear_id = plat_core_pos_by_mpidr(mpidr);
@@ -76,14 +75,14 @@
 static void rcar_pwr_domain_on_finish(const psci_power_state_t *target_state)
 {
 	uint32_t cluster_type = rcar_pwrc_get_cluster();
-	unsigned long mpidr = read_mpidr_el1();
+	u_register_t mpidr = read_mpidr_el1();
 
 	if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
 		if (cluster_type == RCAR_CLUSTER_A53A57)
 			plat_cci_enable();
 
-	rcar_pwrc_disable_interrupt_wakeup(mpidr);
 	rcar_program_mailbox(mpidr, 0);
+	rcar_pwrc_enable_interrupt_wakeup(mpidr);
 
 	gicv2_cpuif_enable();
 	gicv2_pcpu_distif_init();
@@ -94,8 +93,9 @@
 #if RCAR_LSI != RCAR_D3
 	uint32_t cluster_type = rcar_pwrc_get_cluster();
 #endif
-	unsigned long mpidr = read_mpidr_el1();
+	u_register_t mpidr = read_mpidr_el1();
 
+	rcar_pwrc_disable_interrupt_wakeup(mpidr);
 	gicv2_cpuif_disable();
 	rcar_pwrc_cpuoff(mpidr);
 
@@ -112,7 +112,7 @@
 static void rcar_pwr_domain_suspend(const psci_power_state_t *target_state)
 {
 	uint32_t cluster_type = rcar_pwrc_get_cluster();
-	unsigned long mpidr = read_mpidr_el1();
+	u_register_t mpidr = read_mpidr_el1();
 
 	if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE)
 		return;
@@ -178,7 +178,7 @@
 		ERROR("BL3-1:Failed the SYSTEM-RESET.\n");
 #endif
 #else
-	uint64_t cpu = read_mpidr_el1() & 0x0000ffff;
+	u_register_t cpu = read_mpidr_el1() & 0x0000ffffU;
 	int32_t rtn_on;
 
 	rtn_on = rcar_pwrc_cpu_on_check(cpu);
@@ -271,7 +271,7 @@
 #if RCAR_SYSTEM_SUSPEND
 static void rcar_get_sys_suspend_power_state(psci_power_state_t *req_state)
 {
-	unsigned long mpidr = read_mpidr_el1() & 0x0000ffffU;
+	u_register_t mpidr = read_mpidr_el1() & 0x0000ffffU;
 	int i;
 
 	if (mpidr != rcar_boot_mpidr)