commit | 04a54680dda3bc49bf7dcced9a98f7ebb93a94e9 | [log] [tgz] |
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author | Alex Leibovich <alexl@marvell.com> | Sun Mar 10 16:45:02 2019 +0200 |
committer | Marcin Wojtas <mw@semihalf.com> | Sun Jun 07 00:06:03 2020 +0200 |
tree | d1eb506a1519dca0fa331b1f3024a20c72a05385 | |
parent | c035d9dcfe11910d6f6415e871507d9bd1490e16 [diff] |
ddr: a80x0: add DDR 32-bit ECC mode support Change a topology map from internal database to SPD based for 32bit bus width mode Change-Id: I803166893ddc2fd916fc8a1c27fffd34b6ec0c72 Signed-off-by: Alex Leibovich <alexl@marvell.com>