Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
* changes:
rcar_gen3: drivers: qos: Move QoS drivers out of staging
rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
rcar_gen3: drivers: qos: Fix checkpatch issues
rcar_gen3: drivers: qos: V3M: Drop useless comments
rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: V3M: Use common register definition
rcar_gen3: drivers: qos: E3: Drop extra level of nesting
rcar_gen3: drivers: qos: E3: Use common register definition
rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
rcar_gen3: drivers: qos: D3: Drop MD pin check
rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
rcar_gen3: drivers: qos: D3: Drop useless comments
rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: D3: Use common register definition
rcar_gen3: drivers: qos: M3N: Fix checkpatch issues
rcar_gen3: drivers: qos: M3N: Drop MD pin check
rcar_gen3: drivers: qos: M3N: Drop useless comments
rcar_gen3: drivers: qos: M3N: Drop extra level of nesting
rcar_gen3: drivers: qos: M3N: Use common register definition
rcar_gen3: drivers: qos: M3W: Fix checkpatch issues
rcar_gen3: drivers: qos: M3W: Drop MD pin check
rcar_gen3: drivers: qos: M3W: Drop useless comments
rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: M3W: Use common register definition
rcar_gen3: drivers: qos: H3: Fix checkpatch issues
rcar_gen3: drivers: qos: H3: Drop MD pin check
rcar_gen3: drivers: qos: H3: Drop useless comments
rcar_gen3: drivers: qos: H3: Drop extra level of nesting
rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: H3: Use common register definition
rcar_gen3: console: Convert to multi-console API
diff --git a/drivers/auth/auth_mod.c b/drivers/auth/auth_mod.c
index 01f8f29..a6538c4 100644
--- a/drivers/auth/auth_mod.c
+++ b/drivers/auth/auth_mod.c
@@ -31,7 +31,7 @@
#pragma weak plat_set_nv_ctr2
/* Pointer to CoT */
-extern const auth_img_desc_t **const cot_desc_ptr;
+extern const auth_img_desc_t *const *const cot_desc_ptr;
extern unsigned int auth_img_flags[MAX_NUMBER_IDS];
static int cmp_auth_param_type_desc(const auth_param_type_desc_t *a,
diff --git a/include/drivers/auth/auth_mod.h b/include/drivers/auth/auth_mod.h
index 39f5372..6c48124 100644
--- a/include/drivers/auth/auth_mod.h
+++ b/include/drivers/auth/auth_mod.h
@@ -40,11 +40,10 @@
/* Macro to register a CoT defined as an array of auth_img_desc_t pointers */
#define REGISTER_COT(_cot) \
- const auth_img_desc_t **const cot_desc_ptr = \
- (const auth_img_desc_t **const)_cot; \
+ const auth_img_desc_t *const *const cot_desc_ptr = (_cot); \
unsigned int auth_img_flags[MAX_NUMBER_IDS]
-extern const auth_img_desc_t **const cot_desc_ptr;
+extern const auth_img_desc_t *const *const cot_desc_ptr;
extern unsigned int auth_img_flags[MAX_NUMBER_IDS];
#endif /* TRUSTED_BOARD_BOOT */
diff --git a/lib/cpus/aarch64/neoverse_e1.S b/lib/cpus/aarch64/neoverse_e1.S
index d840da8..96b63cf 100644
--- a/lib/cpus/aarch64/neoverse_e1.S
+++ b/lib/cpus/aarch64/neoverse_e1.S
@@ -21,6 +21,21 @@
#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
+ /* -------------------------------------------------
+ * The CPU Ops reset function for Neoverse-E1.
+ * Shall clobber: x0-x19
+ * -------------------------------------------------
+ */
+func neoverse_e1_reset_func
+ mov x19, x30
+
+#if ERRATA_DSU_936184
+ bl errata_dsu_936184_wa
+#endif
+
+ ret x19
+endfunc neoverse_e1_reset_func
+
func neoverse_e1_cpu_pwr_dwn
mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1
orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
@@ -34,6 +49,18 @@
* Errata printing function for Neoverse N1. Must follow AAPCS.
*/
func neoverse_e1_errata_report
+ stp x8, x30, [sp, #-16]!
+
+ bl cpu_get_rev_var
+ mov x8, x0
+
+ /*
+ * Report all errata. The revision-variant information is passed to
+ * checking functions of each errata.
+ */
+ report_errata ERRATA_DSU_936184, neoverse_e1, dsu_936184
+
+ ldp x8, x30, [sp], #16
ret
endfunc neoverse_e1_errata_report
#endif
@@ -50,5 +77,5 @@
endfunc neoverse_e1_cpu_reg_dump
declare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \
- CPU_NO_RESET_FUNC, \
+ neoverse_e1_reset_func, \
neoverse_e1_cpu_pwr_dwn
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index d685b7e..8afc4a2 100644
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -146,6 +146,11 @@
msr CPUAMCNTENSET_EL0, x0
isb
#endif
+
+#if ERRATA_DSU_936184
+ bl errata_dsu_936184_wa
+#endif
+
ret x19
endfunc neoverse_n1_reset_func
@@ -181,6 +186,7 @@
*/
report_errata ERRATA_N1_1043202, neoverse_n1, 1043202
report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
+ report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
ldp x8, x30, [sp], #16
ret
diff --git a/plat/allwinner/common/allwinner-common.mk b/plat/allwinner/common/allwinner-common.mk
index f20f515..585079b 100644
--- a/plat/allwinner/common/allwinner-common.mk
+++ b/plat/allwinner/common/allwinner-common.mk
@@ -38,6 +38,12 @@
# The bootloader is guaranteed to only run on CPU 0 by the boot ROM.
COLD_BOOT_SINGLE_CPU := 1
+# Do not enable SPE (not supported on ARM v8.0).
+ENABLE_SPE_FOR_LOWER_ELS := 0
+
+# Do not enable SVE (not supported on ARM v8.0).
+ENABLE_SVE_FOR_NS := 0
+
# Enable workarounds for Cortex-A53 errata. Allwinner uses at least r0p4.
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
@@ -56,3 +62,6 @@
# We are short on memory, so save 3.5KB by not having an extra coherent page.
USE_COHERENT_MEM := 0
+
+# This platform is single-cluster and does not require coherency setup.
+WARMBOOT_ENABLE_DCACHE_EARLY := 1