commit | 44d1e066831843871d32915347d0ef5bae43c46f | [log] [tgz] |
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author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed May 17 12:26:11 2023 +0800 |
committer | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jul 05 09:08:24 2023 +0800 |
tree | f6dc024ebbcfe53490c3c55a0e1ee3ea33d4ef99 | |
parent | 10c0a365abbcdbea06313fca294530b21cff56b3 [diff] |
feat(intel): memory controller support for Agilex5 SoC FPGA This patch is used to enable memory controller support for Agilex5 SoC FPGA. 1. Added memory controller support. 2. Updated product name -> Agilex5 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I8381b82eeed939b970a7410a6181a514f2c90caa