feat(mt8196): add UFS functions used by the static library
Those functions are used by the static library. To reduce the
proprietary code's reliance on other drivers, these functions should be
moved to the upstream repository.
Change-Id: I6a9430c24bb1f9c1d473b43e65168b620e6bd6b9
Signed-off-by: Yidi Lin <yidilin@chromium.org>
diff --git a/plat/mediatek/drivers/ufs/mt8196/ufs_ctrl_soc.c b/plat/mediatek/drivers/ufs/mt8196/ufs_ctrl_soc.c
new file mode 100644
index 0000000..2db07bf
--- /dev/null
+++ b/plat/mediatek/drivers/ufs/mt8196/ufs_ctrl_soc.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2025, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <drivers/pmic/pmic_set_lowpower.h>
+#if defined(CONFIG_MTK_MTCMOS)
+#include <mtcmos.h>
+#endif
+#include <mtk_bl31_interface.h>
+
+static void ufs_vsx_lpm(bool lpm, uint64_t ufs_version)
+{
+ if (lpm) {
+ /* MT6363 VS2 voter LOW byte BIT6 vote reduce VS2 voltage */
+ PMIC_BUCK_VOTER_EN(MT6363, VS2, VOTER_EN_LO_BIT6, VOTER_EN_CLR);
+
+ /* VS2 buck can enter LPM */
+ PMIC_BUCK_SET_LP(MT6363, VS2, HW2, true, OP_MODE_LP, HW_LP);
+ } else {
+ /* MT6363 VS2 voter LOW byte BIT6 vote raise VS2 voltage */
+ PMIC_BUCK_VOTER_EN(MT6363, VS2, VOTER_EN_LO_BIT6, VOTER_EN_SET);
+
+ /* VS2 buck can not enter LPM */
+ PMIC_BUCK_SET_LP(MT6363, VS2, HW2, true, OP_MODE_LP, HW_ONLV);
+ }
+}
+
+void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version)
+{
+ if (vcc_on)
+ ufs_vsx_lpm(false, ufs_version);
+ else
+ ufs_vsx_lpm(true, ufs_version);
+}
+
+int ufs_spm_mtcmos_power(bool on)
+{
+#if defined(CONFIG_MTK_MTCMOS)
+ return spm_mtcmos_ctrl_ufs0(on ? STA_POWER_ON : STA_POWER_DOWN);
+#else
+ return 0;
+#endif
+}
+
+int ufs_phy_spm_mtcmos_power(bool on)
+{
+#if defined(CONFIG_MTK_MTCMOS)
+ return spm_mtcmos_ctrl_ufs0_phy(on ? STA_POWER_ON : STA_POWER_DOWN);
+#else
+ return 0;
+#endif
+}
diff --git a/plat/mediatek/drivers/ufs/rules.mk b/plat/mediatek/drivers/ufs/rules.mk
index 877cbc7..13d3f53 100644
--- a/plat/mediatek/drivers/ufs/rules.mk
+++ b/plat/mediatek/drivers/ufs/rules.mk
@@ -12,6 +12,7 @@
PLAT_INCLUDES += -I$(MTK_PLAT)/include/drivers/
LOCAL_SRCS-y := $(LOCAL_DIR)/ufs_ctrl.c
+LOCAL_SRCS-y += $(LOCAL_DIR)/$(MTK_SOC)/ufs_ctrl_soc.c
ifeq ($(MTKLIB_PATH),)
LOCAL_SRCS-y += $(LOCAL_DIR)/ufs_stub.c
endif
diff --git a/plat/mediatek/drivers/ufs/ufs_ctrl.c b/plat/mediatek/drivers/ufs/ufs_ctrl.c
index af27e67..14d0616 100644
--- a/plat/mediatek/drivers/ufs/ufs_ctrl.c
+++ b/plat/mediatek/drivers/ufs/ufs_ctrl.c
@@ -8,6 +8,8 @@
/* MTK header */
#include <drivers/pmic/pmic_swap_api.h>
+#include <lpm_v2/mt_lp_api.h>
+#include <lpm_v2/mt_lp_rq.h>
#include <mtk_bl31_interface.h>
#include <mtk_sip_svc.h>
@@ -39,6 +41,63 @@
smccc_ret->a1 = VCC_1;
}
+/* SPM resource control */
+#define RSC_MEM (MT_LP_RQ_DRAM | MT_LP_RQ_EMI)
+#define RSC_PMIC MT_LP_RQ_PMIC
+
+static int ufs_rsc_ctrl(unsigned int rsc, bool hold)
+{
+ static struct mt_lp_resource_user ufs_res_user;
+ int ret = -1;
+
+ if (!ufs_res_user.uid) {
+ ret = mt_lp_resource_user_register("UFS", &ufs_res_user);
+
+ if (ret) {
+ WARN("%s: register lp resource failed\n", __func__);
+ return ret;
+ }
+ }
+
+ if (hold)
+ ret = ufs_res_user.request(&ufs_res_user, rsc);
+ else
+ ret = ufs_res_user.release(&ufs_res_user);
+
+ VERBOSE("%s: rsc=%d, hold=%d\n", __func__, rsc, hold);
+
+ if (ret)
+ WARN("%s: RSC_%d %s failed\n", __func__, rsc, hold ? "request" : "release");
+
+ return ret;
+}
+
+int ufs_rsc_ctrl_mem(bool hold)
+{
+ return ufs_rsc_ctrl(RSC_MEM, hold);
+}
+
+int ufs_rcs_ctrl_pmic(bool hold)
+{
+ return ufs_rsc_ctrl(RSC_PMIC, hold);
+}
+
+/* UFS clock status */
+static uint32_t ufs_clk_sta = UFS_REF_CLK_ON;
+
+bool ufs_is_clk_status_off(void)
+{
+ return ufs_clk_sta == UFS_REF_CLK_OFF;
+}
+
+void ufs_set_clk_status(bool on)
+{
+ if (on)
+ ufs_clk_sta = UFS_REF_CLK_ON;
+ else
+ ufs_clk_sta = UFS_REF_CLK_OFF;
+}
+
static u_register_t ufs_knl_ctrl(u_register_t x1,
u_register_t x2,
u_register_t x3,
@@ -50,10 +109,10 @@
switch (x1) {
case UFS_MTK_SIP_VA09_PWR_CTRL:
- ufs_mphy_va09_cg_ctrl((bool)!!x2);
+ ufs_mphy_va09_cg_ctrl(!!x2);
break;
case UFS_MTK_SIP_DEVICE_RESET:
- ufs_device_reset_ctrl((bool)!!x2);
+ ufs_device_reset_ctrl(!!x2);
break;
case UFS_MTK_SIP_CRYPTO_CTRL:
ufs_crypto_hie_init();
@@ -74,7 +133,9 @@
ufs_mphy_ctrl(x2);
break;
case UFS_MTK_SIP_MTCMOS_CTRL:
- ufs_mtcmos_ctrl(x2);
+#if defined(CONFIG_MTK_MTCMOS)
+ ufs_mtcmos_ctrl(!!x2);
+#endif
break;
default:
ret = -1;
diff --git a/plat/mediatek/include/mtk_bl31_interface.h b/plat/mediatek/include/mtk_bl31_interface.h
index 9650f71..cc6d2e4 100644
--- a/plat/mediatek/include/mtk_bl31_interface.h
+++ b/plat/mediatek/include/mtk_bl31_interface.h
@@ -31,4 +31,13 @@
void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op);
void ufs_mtcmos_ctrl(bool on);
+/* UFS functions implemented in the public ATF repo */
+int ufs_rsc_ctrl_mem(bool hold);
+int ufs_rsc_ctrl_pmic(bool hold);
+void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version);
+int ufs_spm_mtcmos_power(bool on);
+int ufs_phy_spm_mtcmos_power(bool on);
+bool ufs_is_clk_status_off(void);
+void ufs_set_clk_status(bool on);
+
#endif /* __MTK_BL31_INTERFACE_H__ */