tree f814211090c6e75550c908a47a45fcad022a186f
parent e0db40b1da6dd17c7a241d162713b3da032df522
author Dimitris Papastamos <dimitris.papastamos@arm.com> 1512053633 +0000
committer Dimitris Papastamos <dimitris.papastamos@arm.com> 1515666375 +0000

Workaround for CVE-2017-5715 on Cortex A57 and A72

Invalidate the Branch Target Buffer (BTB) on entry to EL3 by disabling
and enabling the MMU.  To achieve this without performing any branch
instruction, a per-cpu vbar is installed which executes the workaround
and then branches off to the corresponding vector entry in the main
vector table.  A side effect of this change is that the main vbar is
configured before any reset handling.  This is to allow the per-cpu
reset function to override the vbar setting.

This workaround is enabled by default on the affected CPUs.

Change-Id: I97788d38463a5840a410e3cea85ed297a1678265
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>