tree 4e7715aa513c186965be0f6f2e4d826515ca9821
parent aa8abf012d0bbb2b0fbf5d0ad5078b114d0863db
author Omkar Anand Kulkarni <omkar.kulkarni@arm.com> 1685515450 +0530
committer Omkar Anand Kulkarni <omkar.kulkarni@arm.com> 1687516796 +0530

feat(plat/arm): firmware first error handling support for base RAMs

RD-N2 platform variants support base element RAM. The RAMs implement
ECC that detects ECC 1/2-bit errors and reports them via interrupts. The
error information is reported as part of error record frames defined for
base element RAMs.

This patch provides reference error handler implementation to handle
1/2-bit RAS errors that occur on base element RAM's. On error event the
error handler reads the error records information and forwards the event
to secure partition. Secure partition creates a CPER record from this
error information. Finally the handler notifies the OS about the RAS
error using the SDEI notification mechanism.

Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com>
Change-Id: Ic209c714de6cd2d4c845198b03724940a2e1c240