| commit | a3ae7fac4fa850ec5397b7fd62c1e867e763d32a | [log] [tgz] |
|---|---|---|
| author | Konstantin Porotchkin <kostap@marvell.com> | Tue Aug 27 16:21:10 2019 +0300 |
| committer | Marcin Wojtas <mw@semihalf.com> | Sun Oct 04 15:56:40 2020 +0200 |
| tree | a8ddd483407f55085ae0201d57685323e1605cff | |
| parent | 78f8becf8d554133ce47b8e62b013a72f602f9da [diff] |
plat: marvell: armada: a3k: allow image load to RAM address 0 Marvell uses RAM address 0x0 for loading BL33 stage images. When ATF is built with DEBUG=1, its IO subsystem fails on assert checking the destination RAM address != 0. This patch adds PLAT_ALLOW_ZERO_ADDR_COPY to A3K platform allowing to bypass the above check in debug mode. Change-Id: I687e35cb2e9dc3166bdaa81b3904c20b784c5c6a Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>