feat(st-clock): don't gate/ungate an oscillator if it is not wired
If the oscillator is not present, the gating will fail.
Change-Id: If9119460a4bcd42053537f1975afe5fe1df05752
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
diff --git a/drivers/st/clk/clk-stm32-core.c b/drivers/st/clk/clk-stm32-core.c
index 9fe8c8c..1e0240e 100644
--- a/drivers/st/clk/clk-stm32-core.c
+++ b/drivers/st/clk/clk-stm32-core.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2022-2024, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
@@ -957,6 +957,10 @@
{
struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);
+ if (osc_data->frequency == 0UL) {
+ return 0;
+ }
+
_clk_stm32_gate_enable(priv, osc_data->gate_id);
if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, true) != 0U) {
@@ -971,6 +975,10 @@
{
struct clk_oscillator_data *osc_data = clk_oscillator_get_data(priv, id);
+ if (osc_data->frequency == 0UL) {
+ return;
+ }
+
_clk_stm32_gate_disable(priv, osc_data->gate_id);
if (_clk_stm32_gate_wait_ready(priv, osc_data->gate_rdy_id, false) != 0U) {