Unify type of "cpu_idx" across PSCI module.
NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned int" type.
Issue / Trouble points
1. cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places leading to coverity issues.
2. Underlying platform API's return cpu_idx as `unsigned int`
and comparison is performed with platform specific defines
`PLAFORM_xxx` which is not consistent
Misra Rule 10.4:
The value of a complex expression of integer type may only be cast to
a type that is narrower and of the same signedness as the underlying
type of the expression.
Based on above points, cpu_idx is kept as `unsigned int` to match
the API's and low-level functions and platform defines are updated
where ever required
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
diff --git a/plat/arm/board/a5ds/include/platform_def.h b/plat/arm/board/a5ds/include/platform_def.h
index d200af6..d30bfc8 100644
--- a/plat/arm/board/a5ds/include/platform_def.h
+++ b/plat/arm/board/a5ds/include/platform_def.h
@@ -89,15 +89,15 @@
#define A5DS_IRQ_SEC_SYS_TIMER 57
/* Default cluster count for A5DS */
-#define A5DS_CLUSTER_COUNT 1
+#define A5DS_CLUSTER_COUNT U(1)
/* Default number of CPUs per cluster on A5DS */
-#define A5DS_MAX_CPUS_PER_CLUSTER 4
+#define A5DS_MAX_CPUS_PER_CLUSTER U(4)
/* Default number of threads per CPU on A5DS */
-#define A5DS_MAX_PE_PER_CPU 1
+#define A5DS_MAX_PE_PER_CPU U(1)
-#define A5DS_CORE_COUNT 4
+#define A5DS_CORE_COUNT U(4)
#define A5DS_PRIMARY_CPU 0x0
@@ -231,7 +231,7 @@
/* Required platform porting definitions */
#define PLATFORM_CORE_COUNT A5DS_CORE_COUNT
#define PLAT_NUM_PWR_DOMAINS (A5DS_CLUSTER_COUNT + \
- PLATFORM_CORE_COUNT) + 1
+ PLATFORM_CORE_COUNT) + U(1)
#define PLAT_MAX_PWR_LVL 2
diff --git a/plat/arm/board/corstone700/include/platform_def.h b/plat/arm/board/corstone700/include/platform_def.h
index de99b06..8dff3ec 100644
--- a/plat/arm/board/corstone700/include/platform_def.h
+++ b/plat/arm/board/corstone700/include/platform_def.h
@@ -14,9 +14,9 @@
#include <plat/common/common_def.h>
/* Core/Cluster/Thread counts for Corstone700 */
-#define CORSTONE700_CLUSTER_COUNT 1
-#define CORSTONE700_MAX_CPUS_PER_CLUSTER 4
-#define CORSTONE700_MAX_PE_PER_CPU 1
+#define CORSTONE700_CLUSTER_COUNT U(1)
+#define CORSTONE700_MAX_CPUS_PER_CLUSTER U(4)
+#define CORSTONE700_MAX_PE_PER_CPU U(1)
#define CORSTONE700_CORE_COUNT (CORSTONE700_CLUSTER_COUNT * \
CORSTONE700_MAX_CPUS_PER_CLUSTER * \
CORSTONE700_MAX_PE_PER_CPU)
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index f1afe36..c2b7b98 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -17,11 +17,12 @@
#include "../fvp_def.h"
/* Required platform porting definitions */
-#define PLATFORM_CORE_COUNT \
- (FVP_CLUSTER_COUNT * FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU)
+#define PLATFORM_CORE_COUNT (U(FVP_CLUSTER_COUNT) * \
+ U(FVP_MAX_CPUS_PER_CLUSTER) * \
+ U(FVP_MAX_PE_PER_CPU))
-#define PLAT_NUM_PWR_DOMAINS (FVP_CLUSTER_COUNT + \
- PLATFORM_CORE_COUNT) + 1
+#define PLAT_NUM_PWR_DOMAINS (U(FVP_CLUSTER_COUNT) + \
+ PLATFORM_CORE_COUNT + U(1))
#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
@@ -32,7 +33,7 @@
/*
* Required ARM standard platform porting definitions
*/
-#define PLAT_ARM_CLUSTER_COUNT FVP_CLUSTER_COUNT
+#define PLAT_ARM_CLUSTER_COUNT U(FVP_CLUSTER_COUNT)
#define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00040000) /* 256 KB */
diff --git a/plat/arm/board/fvp_ve/fvp_ve_def.h b/plat/arm/board/fvp_ve/fvp_ve_def.h
index 565753a..98de5f6 100644
--- a/plat/arm/board/fvp_ve/fvp_ve_def.h
+++ b/plat/arm/board/fvp_ve/fvp_ve_def.h
@@ -10,17 +10,17 @@
#include <lib/utils_def.h>
/* Default cluster count for FVP VE */
-#define FVP_VE_CLUSTER_COUNT 1
+#define FVP_VE_CLUSTER_COUNT U(1)
/* Default number of CPUs per cluster on FVP VE */
-#define FVP_VE_MAX_CPUS_PER_CLUSTER 1
+#define FVP_VE_MAX_CPUS_PER_CLUSTER U(1)
/* Default number of threads per CPU on FVP VE */
-#define FVP_VE_MAX_PE_PER_CPU 1
+#define FVP_VE_MAX_PE_PER_CPU U(1)
-#define FVP_VE_CORE_COUNT 1
+#define FVP_VE_CORE_COUNT U(1)
-#define FVP_VE_PRIMARY_CPU 0x0
+#define FVP_VE_PRIMARY_CPU 0x0
/*******************************************************************************
* FVP memory map related constants
diff --git a/plat/arm/board/fvp_ve/include/platform_def.h b/plat/arm/board/fvp_ve/include/platform_def.h
index 4e575e1..1b07a9b 100644
--- a/plat/arm/board/fvp_ve/include/platform_def.h
+++ b/plat/arm/board/fvp_ve/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -211,9 +211,9 @@
#define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/* Required platform porting definitions */
-#define PLATFORM_CORE_COUNT 1
+#define PLATFORM_CORE_COUNT FVP_VE_CLUSTER_COUNT
#define PLAT_NUM_PWR_DOMAINS ((FVP_VE_CLUSTER_COUNT + \
- PLATFORM_CORE_COUNT) + 1)
+ PLATFORM_CORE_COUNT) + U(1))
#define PLAT_MAX_PWR_LVL 2
diff --git a/plat/arm/board/juno/juno_def.h b/plat/arm/board/juno/juno_def.h
index 7a8bedf..3b34a9f 100644
--- a/plat/arm/board/juno/juno_def.h
+++ b/plat/arm/board/juno/juno_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -32,9 +32,9 @@
/*******************************************************************************
* Juno topology related constants
******************************************************************************/
-#define JUNO_CLUSTER_COUNT 2
-#define JUNO_CLUSTER0_CORE_COUNT 2
-#define JUNO_CLUSTER1_CORE_COUNT 4
+#define JUNO_CLUSTER_COUNT U(2)
+#define JUNO_CLUSTER0_CORE_COUNT U(2)
+#define JUNO_CLUSTER1_CORE_COUNT U(4)
/*******************************************************************************
* TZC-400 related constants
diff --git a/plat/arm/board/rde1edge/include/platform_def.h b/plat/arm/board/rde1edge/include/platform_def.h
index 50b04f0..2be3f88 100644
--- a/plat/arm/board/rde1edge/include/platform_def.h
+++ b/plat/arm/board/rde1edge/include/platform_def.h
@@ -11,9 +11,9 @@
#include <sgi_base_platform_def.h>
-#define PLAT_ARM_CLUSTER_COUNT 2
-#define CSS_SGI_MAX_CPUS_PER_CLUSTER 8
-#define CSS_SGI_MAX_PE_PER_CPU 2
+#define PLAT_ARM_CLUSTER_COUNT U(2)
+#define CSS_SGI_MAX_CPUS_PER_CLUSTER U(8)
+#define CSS_SGI_MAX_PE_PER_CPU U(2)
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
diff --git a/plat/arm/board/rdn1edge/include/platform_def.h b/plat/arm/board/rdn1edge/include/platform_def.h
index 580ab8e..c635faa 100644
--- a/plat/arm/board/rdn1edge/include/platform_def.h
+++ b/plat/arm/board/rdn1edge/include/platform_def.h
@@ -11,9 +11,9 @@
#include <sgi_base_platform_def.h>
-#define PLAT_ARM_CLUSTER_COUNT 2
-#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4
-#define CSS_SGI_MAX_PE_PER_CPU 1
+#define PLAT_ARM_CLUSTER_COUNT U(2)
+#define CSS_SGI_MAX_CPUS_PER_CLUSTER U(4)
+#define CSS_SGI_MAX_PE_PER_CPU U(1)
#define PLAT_CSS_MHU_BASE UL(0x45400000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
diff --git a/plat/arm/board/sgi575/include/platform_def.h b/plat/arm/board/sgi575/include/platform_def.h
index f00146f..fd59e52 100644
--- a/plat/arm/board/sgi575/include/platform_def.h
+++ b/plat/arm/board/sgi575/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -11,9 +11,9 @@
#include <sgi_base_platform_def.h>
-#define PLAT_ARM_CLUSTER_COUNT 2
-#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4
-#define CSS_SGI_MAX_PE_PER_CPU 1
+#define PLAT_ARM_CLUSTER_COUNT U(2)
+#define CSS_SGI_MAX_CPUS_PER_CLUSTER U(4)
+#define CSS_SGI_MAX_PE_PER_CPU U(1)
#define PLAT_CSS_MHU_BASE UL(0x45000000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
diff --git a/plat/arm/board/sgm775/include/platform_def.h b/plat/arm/board/sgm775/include/platform_def.h
index 27d1b33..d165ff9 100644
--- a/plat/arm/board/sgm775/include/platform_def.h
+++ b/plat/arm/board/sgm775/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -9,8 +9,8 @@
#include <sgm_base_platform_def.h>
-#define PLAT_MAX_CPUS_PER_CLUSTER 8
-#define PLAT_MAX_PE_PER_CPU 1
+#define PLAT_MAX_CPUS_PER_CLUSTER U(8)
+#define PLAT_MAX_PE_PER_CPU U(1)
/*
* Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes
diff --git a/plat/arm/css/sgm/include/sgm_base_platform_def.h b/plat/arm/css/sgm/include/sgm_base_platform_def.h
index f349c19..24bbed5 100644
--- a/plat/arm/css/sgm/include/sgm_base_platform_def.h
+++ b/plat/arm/css/sgm/include/sgm_base_platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -17,8 +17,8 @@
#include <plat/common/common_def.h>
/* CPU topology */
-#define PLAT_ARM_CLUSTER_COUNT 1
-#define PLAT_ARM_CLUSTER_CORE_COUNT 8
+#define PLAT_ARM_CLUSTER_COUNT U(1)
+#define PLAT_ARM_CLUSTER_CORE_COUNT U(8)
#define PLATFORM_CORE_COUNT PLAT_ARM_CLUSTER_CORE_COUNT
#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
diff --git a/plat/common/plat_psci_common.c b/plat/common/plat_psci_common.c
index 16bec79..27ec81e 100644
--- a/plat/common/plat_psci_common.c
+++ b/plat/common/plat_psci_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -92,7 +92,7 @@
*/
u_register_t plat_psci_stat_get_residency(unsigned int lvl,
const psci_power_state_t *state_info,
- int last_cpu_idx)
+ unsigned int last_cpu_idx)
{
plat_local_state_t state;
unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
@@ -103,7 +103,7 @@
assert(last_cpu_idx <= PLATFORM_CORE_COUNT);
if (lvl == PSCI_CPU_PWR_LVL)
- assert((unsigned int)last_cpu_idx == plat_my_core_pos());
+ assert(last_cpu_idx == plat_my_core_pos());
/*
* If power down is requested, then timestamp capture will