fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled
Fix below MISRA violations generated with IPI_CRC_CHECK enabled:
- MISRA-C rule 8.3
- Made same parameter names in function declaration and definition.
- MISRA-C rule 12.2
- Type casted left operand to a larger width than shift.
- MISRA-C rule 15.6
- Added braces for if statements.
Change-Id: I90c5723e77431cc29b9896425ce1be94df44c042
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
diff --git a/plat/xilinx/common/pm_service/pm_ipi.c b/plat/xilinx/common/pm_service/pm_ipi.c
index 86b55ab..38c36e5 100644
--- a/plat/xilinx/common/pm_service/pm_ipi.c
+++ b/plat/xilinx/common/pm_service/pm_ipi.c
@@ -312,7 +312,7 @@
}
#if IPI_CRC_CHECK
-uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t bufsize)
+uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t buffersize)
{
uint32_t crcinit = CRC_INIT_VALUE;
uint32_t order = CRC_ORDER;
@@ -320,20 +320,22 @@
uint32_t i, j, c, bit, datain, crcmask, crchighbit;
uint32_t crc = crcinit;
- crcmask = ((uint32_t)((1U << (order - 1U)) - 1U) << 1U) | 1U;
- crchighbit = (uint32_t)(1U << (order - 1U));
+ crcmask = ((((uint32_t)1U << (order - 1U)) - 1U) << 1U) | 1U;
+ crchighbit = ((uint32_t)1U << (order - 1U));
- for (i = 0U; i < bufsize; i++) {
+ for (i = 0U; i < buffersize; i++) {
datain = mmio_read_8((unsigned long)payload + i);
c = datain;
j = 0x80U;
while (j != 0U) {
bit = crc & crchighbit;
crc <<= 1U;
- if (0U != (c & j))
+ if (0U != (c & j)) {
bit ^= crchighbit;
- if (bit != 0U)
+ }
+ if (bit != 0U) {
crc ^= polynom;
+ }
j >>= 1U;
}
crc &= crcmask;