tree 3bc7f2ae7d0c461267d39b98c8fb3cc0f650a2b2
parent fa35b80f5b52238e919cbbf51c4d97f92e52d14c
author Stephan Gerhold <stephan@gerhold.net> 1678868689 +0100
committer Stephan Gerhold <stephan@gerhold.net> 1689764038 +0200

feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+

Newer Qualcomm platforms similar to MSM8916 use MMU-500 r2p0+ instead
of MMU-500 r0p0. On these versions it is necessary to clear the
SMMU_sACR.CACHE_LOCK bit to allow the normal world to write to
SMMU_CBn_ACTLR. Without this Linux shows a warning and is unable to
workaround the errata in MMU-500:

  arm-smmu 1e00000.iommu: Failed to disable prefetcher
    [errata #841119  and #826419], check ACR.CACHE_LOCK

Handle this dynamically at runtime by enabling all the necessary SMMU
clocks and check the IDR7 register for MMU-500 r2p0+. This must be
applied to both SMMUs on the platform: APPS and GPU.

While at it clean up the clock handling: Leave the SMMU clocks on
because the normal world will need it again while booting. But make
sure the vote register of the RPM co-processor does not keep these
clocks always-on. For some reasons some platforms seem to have a
non-zero reset value for GCC_RPM_SMMU_CLOCK_BRANCH_ENA_VOTE.

Change-Id: I34cf7d3f2db977b0930eb6e64a870ecaf02a7573
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>