feat(tc): update DT for Drage GPU
This patch incorporates the changes for Drage GPU to uses new access
window interface "IRQ_AW". As the interrupt properties are different
between TC4 and other TC platforms, this patch appends the interrupt
properties in platform specific DT binding file.
Change-Id: I2ca505846f03ce64b8e5f02fd202962dbfe39f25
Signed-off-by: Leo Yan <leo.yan@arm.com>
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index f191e29..be0a9f6 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -495,10 +495,6 @@
gpu: gpu@2d000000 {
compatible = "arm,mali-midgard";
reg = <0x0 0x2d000000 0x0 0x200000>;
- interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "JOB", "MMU", "GPU";
clocks = <&gpu_core_clk>;
clock-names = "shadercores";
#if TC_SCMI_PD_CTRL_EN
diff --git a/fdts/tc2.dts b/fdts/tc2.dts
index 8344d16..c492274 100644
--- a/fdts/tc2.dts
+++ b/fdts/tc2.dts
@@ -291,6 +291,10 @@
};
gpu: gpu@2d000000 {
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "JOB", "MMU", "GPU";
iommus = <&smmu_700 0x200>;
};
};
diff --git a/fdts/tc3.dts b/fdts/tc3.dts
index 51431c2..ffe3b6d 100644
--- a/fdts/tc3.dts
+++ b/fdts/tc3.dts
@@ -110,6 +110,10 @@
};
gpu: gpu@2d000000 {
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "JOB", "MMU", "GPU";
#if TARGET_FLAVOUR_FVP
iommus = <&smmu_700 0x200>;
#endif
diff --git a/fdts/tc4.dts b/fdts/tc4.dts
index ef7a080..13fabc9 100644
--- a/fdts/tc4.dts
+++ b/fdts/tc4.dts
@@ -44,3 +44,10 @@
#include "tc-fpga.dtsi"
#endif /* TARGET_FLAVOUR_FVP */
#include "tc3-4-base.dtsi"
+
+/ {
+ gpu: gpu@2d000000 {
+ interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "IRQAW";
+ };
+};