Common driver for ARM Cache Coherent Interconnects
Even though both CCI-400 and CCI-500 IPs have different configurations
with respect to the number and types of supported interfaces, their
register offsets and programming sequences are similar. This patch
creates a common driver for enabling and disabling snoop transactions
and DVMs with both the IPs.
New platform ports which implement one of these IPs should use this
common driver. Existing platform ports which implement CCI-400 should
migrate to the common driver as the standalone CCI-400 will be
deprecated in the future.
Change-Id: I3ccd0eb7b062922d2e4a374ff8c21e79fa357556
diff --git a/Makefile b/Makefile
index 1e2f324..9dff969 100644
--- a/Makefile
+++ b/Makefile
@@ -60,6 +60,9 @@
# Determine the version of ARM GIC architecture to use for interrupt management
# in EL3. The platform port can change this value if needed.
ARM_GIC_ARCH := 2
+# Determine the version of ARM CCI product used in the platform. The platform
+# port can change this value if needed.
+ARM_CCI_PRODUCT_ID := 400
# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
# This defaults to being present in DEBUG builds only.
ASM_ASSERTION := ${DEBUG}
@@ -235,6 +238,9 @@
# Process ARM_GIC_ARCH flag
$(eval $(call add_define,ARM_GIC_ARCH))
+# Process ARM_CCI_PRODUCT_ID flag
+$(eval $(call add_define,ARM_CCI_PRODUCT_ID))
+
# Process ASM_ASSERTION flag
$(eval $(call assert_boolean,ASM_ASSERTION))
$(eval $(call add_define,ASM_ASSERTION))