| commit | 40b6d86edd53cdff9e1975b248022d8594852d0c | [log] [tgz] |
|---|---|---|
| author | Jiafei Pan <Jiafei.Pan@nxp.com> | Fri Sep 10 19:13:27 2021 +0800 |
| committer | Jiafei Pan <Jiafei.Pan@nxp.com> | Wed Sep 15 11:19:36 2021 +0800 |
| tree | 04f09a8b0767633ff3ab33b0527f207a3bfd14c0 | |
| parent | 67a9890419b3a0ee7345a9504d03ca29cd407d4c [diff] |
feat(plat/nxp/common): add SecMon register definition for ch_3_2 Add SecMon register definition for ch_3_2. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I80d134ea4e94ad234e1a8fbd02798d5fd86d2544
diff --git a/plat/nxp/common/include/default/ch_3_2/soc_default_helper_macros.h b/plat/nxp/common/include/default/ch_3_2/soc_default_helper_macros.h index cdc823a..8de516e 100644 --- a/plat/nxp/common/include/default/ch_3_2/soc_default_helper_macros.h +++ b/plat/nxp/common/include/default/ch_3_2/soc_default_helper_macros.h
@@ -39,6 +39,10 @@ #endif /* NXP_RESET_ADDR */ +/* secmon register offsets and bitfields */ +#define SECMON_HPCOMR_OFFSET 0x4 +#define SECMON_HPCOMR_NPSWAEN 0x80000000 + /* Secure-Register-File register offsets and bit masks */ #ifdef NXP_RST_ADDR /* Register Offset */