Merge pull request #138 from athoelke/at/cpu-context
Move CPU context pointers into cpu_data
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index 2e7476a..e4dfea4 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -72,11 +72,13 @@
isb
/* ---------------------------------------------
- * Set the exception vector to something sane.
+ * Set the exception vector and zero tpidr_el3
+ * until the crash reporting is set up
* ---------------------------------------------
*/
- adr x1, early_exceptions
+ adr x1, runtime_exceptions
msr vbar_el3, x1
+ msr tpidr_el3, xzr
/* ---------------------------------------------------------------------
* The initial state of the Architectural feature trap register
@@ -134,10 +136,10 @@
* Initialise cpu_data and crash reporting
* ---------------------------------------------
*/
- bl init_cpu_data_ptr
#if CRASH_REPORTING
bl init_crash_reporting
#endif
+ bl init_cpu_data_ptr
/* ---------------------------------------------
* Use SP_EL0 for the C runtime stack.
diff --git a/bl31/bl31.mk b/bl31/bl31.mk
index 4602e41..5555c31 100644
--- a/bl31/bl31.mk
+++ b/bl31/bl31.mk
@@ -38,8 +38,7 @@
bl31/aarch64/context.S \
bl31/aarch64/cpu_data.S \
bl31/aarch64/runtime_exceptions.S \
- bl31/aarch64/crash_reporting.S \
- common/aarch64/early_exceptions.S \
+ bl31/aarch64/crash_reporting.S \
lib/aarch64/cpu_helpers.S \
lib/locks/bakery/bakery_lock.c \
lib/locks/exclusive/spinlock.S \
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index 5bb11ba..6f88e65 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -71,7 +71,6 @@
******************************************************************************/
void bl31_main(void)
{
-
/* Perform remaining generic architectural setup from EL3 */
bl31_arch_setup();
@@ -89,16 +88,7 @@
/* Clean caches before re-entering normal world */
dcsw_op_all(DCCSW);
- /*
- * Use the more complex exception vectors now that context
- * management is setup. SP_EL3 should point to a 'cpu_context'
- * structure which has an exception stack allocated. The PSCI
- * service should have set the context.
- */
- assert(cm_get_context(NON_SECURE));
- cm_set_next_eret_context(NON_SECURE);
- write_vbar_el3((uint64_t) runtime_exceptions);
- isb();
+ /* By default run the non-secure BL3-3 image next */
next_image_type = NON_SECURE;
/*
diff --git a/drivers/arm/pl011/pl011_console.c b/drivers/arm/pl011/pl011_console.c
index a26c00e..81897ca 100644
--- a/drivers/arm/pl011/pl011_console.c
+++ b/drivers/arm/pl011/pl011_console.c
@@ -71,7 +71,12 @@
int console_putc(int c)
{
- assert(uart_base);
+ /* If the console has not been initialized then return an error
+ * code. Asserting here would result in recursion and stack
+ * exhaustion
+ */
+ if (!uart_base)
+ return -1;
if (c == '\n') {
WAIT_UNTIL_UART_FREE(uart_base);
diff --git a/include/bl31/runtime_svc.h b/include/bl31/runtime_svc.h
index 3b84f06..f3543d4 100644
--- a/include/bl31/runtime_svc.h
+++ b/include/bl31/runtime_svc.h
@@ -268,7 +268,6 @@
extern uint64_t __RT_SVC_DESCS_START__;
extern uint64_t __RT_SVC_DESCS_END__;
void init_crash_reporting(void);
-void runtime_exceptions(void);
#endif /*__ASSEMBLY__*/
#endif /* __RUNTIME_SVC_H__ */
diff --git a/plat/fvp/fvp_def.h b/plat/fvp/fvp_def.h
index 04ba611..59dcc90 100644
--- a/plat/fvp/fvp_def.h
+++ b/plat/fvp/fvp_def.h
@@ -137,7 +137,7 @@
#define SYS_LED_EC_MASK 0x1f
/* V2M sysid register bits */
-#define SYS_ID_REV_SHIFT 27
+#define SYS_ID_REV_SHIFT 28
#define SYS_ID_HBI_SHIFT 16
#define SYS_ID_BLD_SHIFT 12
#define SYS_ID_ARCH_SHIFT 8
diff --git a/plat/fvp/fvp_pm.c b/plat/fvp/fvp_pm.c
index d702643..03f06e7 100644
--- a/plat/fvp/fvp_pm.c
+++ b/plat/fvp/fvp_pm.c
@@ -290,7 +290,7 @@
int rc = PSCI_E_SUCCESS;
unsigned long linear_id, cpu_setup;
mailbox_t *fvp_mboxes;
- unsigned int gicd_base, gicc_base, reg_val, ectlr;
+ unsigned int gicd_base, gicc_base, ectlr;
switch (afflvl) {
@@ -354,17 +354,6 @@
/* TODO: This setup is needed only after a cold boot */
gic_pcpu_distif_setup(gicd_base);
- /* Allow access to the System counter timer module */
- reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
- reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
- reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT);
- mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(0), reg_val);
- mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(1), reg_val);
-
- reg_val = (1 << CNTNSAR_NS_SHIFT(0)) |
- (1 << CNTNSAR_NS_SHIFT(1));
- mmio_write_32(SYS_TIMCTL_BASE + CNTNSAR, reg_val);
-
break;
default:
diff --git a/services/std_svc/psci/psci_afflvl_on.c b/services/std_svc/psci/psci_afflvl_on.c
index 1c7a877..e4d8f1f 100644
--- a/services/std_svc/psci/psci_afflvl_on.c
+++ b/services/std_svc/psci/psci_afflvl_on.c
@@ -373,16 +373,6 @@
bl31_arch_setup();
/*
- * Use the more complex exception vectors to enable SPD
- * initialisation. SP_EL3 should point to a 'cpu_context'
- * structure. The calling cpu should have set the
- * context already
- */
- assert(cm_get_context(NON_SECURE));
- cm_set_next_eret_context(NON_SECURE);
- write_vbar_el3((uint64_t) runtime_exceptions);
-
- /*
* Call the cpu on finish handler registered by the Secure Payload
* Dispatcher to let it do any bookeeping. If the handler encounters an
* error, it's expected to assert within
diff --git a/services/std_svc/psci/psci_afflvl_suspend.c b/services/std_svc/psci/psci_afflvl_suspend.c
index 3a1a419..9934310 100644
--- a/services/std_svc/psci/psci_afflvl_suspend.c
+++ b/services/std_svc/psci/psci_afflvl_suspend.c
@@ -491,15 +491,6 @@
rc = PSCI_E_SUCCESS;
/*
- * Use the more complex exception vectors to enable SPD
- * initialisation. SP_EL3 should point to a 'cpu_context'
- * structure. The non-secure context should have been
- * set on this cpu prior to suspension.
- */
- cm_set_next_eret_context(NON_SECURE);
- write_vbar_el3((uint64_t) runtime_exceptions);
-
- /*
* Call the cpu suspend finish handler registered by the Secure Payload
* Dispatcher to let it do any bookeeping. If the handler encounters an
* error, it's expected to assert within
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index 037673d..5628d79 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -67,12 +67,10 @@
bl init_cpu_data_ptr
/* ---------------------------------------------
- * Exceptions should not occur at this point.
- * Set VBAR in order to handle and report any
- * that do occur
+ * Set the exception vectors
* ---------------------------------------------
*/
- adr x0, early_exceptions
+ adr x0, runtime_exceptions
msr vbar_el3, x0
isb