imx: power optimization for i.mx8qx
Current implementation of i.MX8QX power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.
To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.
If resources are powered off for suspend, they should be restored
properly after system resume.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
diff --git a/plat/imx/imx8qx/include/platform_def.h b/plat/imx/imx8qx/include/platform_def.h
index 1239340..3a3fac8 100644
--- a/plat/imx/imx8qx/include/platform_def.h
+++ b/plat/imx/imx8qx/include/platform_def.h
@@ -37,18 +37,19 @@
#define MAX_MMAP_REGIONS 8
#define PLAT_GICD_BASE 0x51a00000
-#define PLAT_GICD_SIZE 0x10000
#define PLAT_GICR_BASE 0x51b00000
-#define PLAT_GICR_SIZE 0xc0000
#define IMX_BOOT_UART_BASE 0x5a060000
-#define IMX_BOOT_UART_SIZE 0x1000
#define IMX_BOOT_UART_BAUDRATE 115200
#define IMX_BOOT_UART_CLK_IN_HZ 24000000
#define PLAT_CRASH_UART_BASE IMX_BOOT_UART_BASE
#define PLAT__CRASH_UART_CLK_IN_HZ 24000000
#define IMX_CONSOLE_BAUDRATE 115200
#define SC_IPC_BASE 0x5d1b0000
-#define SC_IPC_SIZE 0x10000
+#define IMX_GPT0_LPCG_BASE 0x5d540000
+#define IMX_GPT0_BASE 0x5d140000
+#define IMX_WUP_IRQSTR_BASE 0x51090000
+#define IMX_REG_BASE 0x50000000
+#define IMX_REG_SIZE 0x10000000
#define COUNTER_FREQUENCY 8000000
diff --git a/plat/imx/imx8qx/include/sec_rsrc.h b/plat/imx/imx8qx/include/sec_rsrc.h
index 37c9f66..b7fe0e8 100644
--- a/plat/imx/imx8qx/include/sec_rsrc.h
+++ b/plat/imx/imx8qx/include/sec_rsrc.h
@@ -14,10 +14,12 @@
SC_R_A35_3,
SC_R_GIC,
SC_R_SYSTEM,
- SC_R_IRQSTR_SCU2
+ SC_R_IRQSTR_SCU2,
+ SC_R_GPT_0
};
/* resources that have register access for non-secure domain */
sc_rsrc_t ns_access_allowed[] = {
SC_R_GIC,
+ SC_R_GPT_0
};