tree b9f3e85461c9a5ded71e56de658dbb8990302d13
parent a67fa2657a12e9d2d982988f8b693ab3bd135176
author Yatharth Kochar <yatharth.kochar@arm.com> 1473158885 +0100
committer Yatharth Kochar <yatharth.kochar@arm.com> 1473693548 +0100

GICv3: Allow either G1S or G0 interrupts to be configured

Currently the GICv3 driver mandates that platform populate
both G1S and G0 interrupts. However, it is possible that a
given platform is not interested in both the groups and
just needs to specify either one of them.

This patch modifies the `gicv3_rdistif_init()` & `gicv3_distif_init()`
functions to allow either G1S or G0 interrupts to be configured.

Fixes ARM-software/tf-issues#400

Change-Id: I43572b0e08ae30bed5af9334f25d35bf439b0d2b