diff --git a/plat/rockchip/rk3368/drivers/soc/soc.c b/plat/rockchip/rk3368/drivers/soc/soc.c
index 601f438..ecdac01 100644
--- a/plat/rockchip/rk3368/drivers/soc/soc.c
+++ b/plat/rockchip/rk3368/drivers/soc/soc.c
@@ -198,7 +198,7 @@
 		      plls_con[NPLL_ID][3] | PLLS_MODE_WMASK);
 }
 
-void __dead2 soc_sys_global_soft_reset(void)
+void __dead2 rockchip_soc_soft_reset(void)
 {
 	uint32_t temp_val;
 
diff --git a/plat/rockchip/rk3368/drivers/soc/soc.h b/plat/rockchip/rk3368/drivers/soc/soc.h
index f0a892c..b1373d5 100644
--- a/plat/rockchip/rk3368/drivers/soc/soc.h
+++ b/plat/rockchip/rk3368/drivers/soc/soc.h
@@ -157,7 +157,6 @@
 #define regs_updata_bit_clr(addr, shift) \
 		regs_updata_bits((addr), 0x0, 0x1, (shift))
 
-void __dead2 soc_sys_global_soft_reset(void);
 void regs_updata_bits(uintptr_t addr, uint32_t val,
 		      uint32_t mask, uint32_t shift);
 void soc_sleep_config(void);