feat(errata): implement workaround for DSU-120 erratum 2900952
DSU Erratum 2900952 is a Cat B erratum that applies to some
DSU-120 implementations of revision r2p0 and is fixed in r2p1.
This erratum is fixed in certain implementations of r2p0 which can be
determined by reading the IMP_CLUSTERREVIDR_EL1[1] register field
where a set bit indicates that the erratum is fixed in this part.
The workaround is to set the CLUSTERACTLR_EL1 bits [21:20] to 0x3
which ignores CBusy from the system interconnect and
setting CLUSTERACTLR_EL1 bit [8] to 1 to assert CBusy from DSU to
all the cores when DSU is busy.
SDEN: https://developer.arm.com/documentation/SDEN-2453103/1200/?lang=en
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I87aa440ab5c35121aff703032f5cf7a62d0b0bb4
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 117372f..d43541e 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -1049,6 +1049,12 @@
please note that this workaround results in increased DSU power consumption
on idle.
+- ``ERRATA_DSU_2900952``: This applies errata 2900952 workaround for the
+ affected DSU-120 configurations. This erratum applies to some r2p0
+ implementations and is fixed in r2p1. The affected r2p0 implementations
+ are determined by reading the IMP_CLUSTERREVIDR_EL1[1] register bit
+ and making sure it's clear.
+
CPU Specific optimizations
--------------------------