commit | 3d9372f29659d8a6f924d8dae430add2d99d9f92 | [log] [tgz] |
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author | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Tue Jan 28 12:05:25 2025 +0200 |
committer | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Tue Feb 18 09:59:04 2025 +0200 |
tree | a8319e596ecf13fc38ddd64ba378e2e360a7529e | |
parent | 6c204fb6cc894229769c0a49a5378540f6921953 [diff] |
feat(nxp-clk): add clock modules for uSDHC One of the uSDHC module's clock lines is attached to the CGM_MUX 14 divider, which is connected to PERIPH_DFS3. The other one is attached to XBAR_DIV3. Change-Id: I23f468a3e5f7daa832c0841b55211a048284a7f0 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>