diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
index db337b6..6312948 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
@@ -20,8 +20,6 @@
 
 static void dbsc_setting(void)
 {
-	uint32_t md = 0;
-
 	/* BUFCAM settings */
 	/* DBSC_DBCAM0CNF0 not set */
 	io_write_32(DBSC_DBCAM0CNF1, 0x00044218);
@@ -32,26 +30,8 @@
 	io_write_32(DBSC_DBSCHSZ0, 0x00000001);
 	io_write_32(DBSC_DBSCHRW0, 0x22421111);
 
-	md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-	switch (md) {
-	case 0x0:
-		/* DDR3200 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123);
-		break;
-	case 0x1:		/* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-		/* DDR2800 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123);
-		break;
-	case 0x4:		/* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-		/* DDR2400 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123);
-		break;
-	default:		/* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-		/* DDR1600 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123);
-		break;
-	}
+	/* DDR3 */
+	io_write_32(DBSC_SCFCTST2, 0x012F1123);
 
 	/* QoS Settings */
 	io_write_32(DBSC_DBSCHQOS00, 0x0000F000);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index 9c64e51..c54aca0 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-	uint32_t md = 0;
-
 	/* Register write enable */
 	io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@
 	io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
 	io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-	md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-	switch (md) {
-	case 0x0:
-		/* DDR3200 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x1:		/* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-		/* DDR2800 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x4:		/* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-		/* DDR2400 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	default:		/* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-		/* DDR1600 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	}
+	/* DDR3 */
+	io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
 	/* QoS Settings */
 	io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 730ef0d..44b58cb 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-	uint32_t md = 0;
-
 	/* Register write enable */
 	io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@
 	io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
 	io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-	md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-	switch (md) {
-	case 0x0:
-		/* DDR3200 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x1:		/* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-		/* DDR2800 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x4:		/* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-		/* DDR2400 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	default:		/* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-		/* DDR1600 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	}
+	/* DDR3 */
+	io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
 	/* QoS Settings */
 	io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index f03f0c0..80870fb 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-	uint32_t md = 0;
-
 	/* Register write enable */
 	io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@
 	io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
 	io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-	md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-	switch (md) {
-	case 0x0:
-		/* DDR3200 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x1:		/* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-		/* DDR2800 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	case 0x4:		/* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-		/* DDR2400 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	default:		/* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-		/* DDR1600 */
-		io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-		break;
-	}
+	/* DDR3 */
+	io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
 	/* QoS Settings */
 	io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);