Place assembler functions in separate sections
This extends the --gc-sections behaviour to the many assembler
support functions in the firmware images by placing each function
into its own code section. This is achieved by creating a 'func'
macro used to declare each function label.
Fixes ARM-software/tf-issues#80
Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
diff --git a/plat/common/aarch64/platform_helpers.S b/plat/common/aarch64/platform_helpers.S
index 563f198..50abb70 100644
--- a/plat/common/aarch64/platform_helpers.S
+++ b/plat/common/aarch64/platform_helpers.S
@@ -30,6 +30,7 @@
#include <arch.h>
#include <platform.h>
+#include <asm_macros.S>
.globl pcpu_dv_mem_stack
@@ -51,8 +52,6 @@
#define PCPU_DV_MEM_STACK_SIZE 0x300
#endif
- .section .text, "ax"; .align 3
-
/* -----------------------------------------------------
* unsigned long long platform_set_coherent_stack
* (unsigned mpidr);
@@ -62,7 +61,7 @@
* SCTLR.C bit e.g. while powering down a cpu
* -----------------------------------------------------
*/
-platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
+func platform_set_coherent_stack
mov x5, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -79,7 +78,7 @@
* CoreId
* -----------------------------------------------------
*/
-platform_get_core_pos: ; .type platform_get_core_pos, %function
+func platform_get_core_pos
and x1, x0, #MPIDR_CPU_MASK
and x0, x0, #MPIDR_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -93,7 +92,7 @@
* cpu (applicable ony after a cold boot)
* -----------------------------------------------------
*/
-platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
+func platform_is_primary_cpu
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
cmp x0, #PRIMARY_CPU
cset x0, eq
@@ -103,7 +102,7 @@
* void platform_get_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_get_stack: ; .type platform_get_stack, %function
+func platform_get_stack
mov x10, x30 // lr
bl platform_get_core_pos
add x0, x0, #1
@@ -117,7 +116,7 @@
* void platform_set_stack (unsigned long mpidr)
* -----------------------------------------------------
*/
-platform_set_stack: ; .type platform_set_stack, %function
+func platform_set_stack
mov x9, x30 // lr
bl platform_get_stack
mov sp, x0
@@ -128,7 +127,7 @@
* each platform.
* -----------------------------------------------------
*/
-platform_check_mpidr: ; .type platform_check_mpidr, %function
+func platform_check_mpidr
mov x0, xzr
ret
@@ -137,7 +136,7 @@
* each platform.
* -----------------------------------------------------
*/
-plat_report_exception:
+func plat_report_exception
ret
/* -----------------------------------------------------
diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index c487f03..fad37af 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -32,15 +32,13 @@
#include <platform.h>
#include <fvp_pwrc.h>
#include <gic.h>
+#include <asm_macros.S>
.globl platform_get_entrypoint
.globl platform_cold_boot_init
.globl plat_secondary_cold_boot_setup
- .section .text, "ax"; .align 3
-
-
.macro platform_choose_gicmmap param1, param2, x_tmp, w_tmp, res
ldr \x_tmp, =VE_SYSREGS_BASE + V2M_SYS_ID
ldr \w_tmp, [\x_tmp]
@@ -60,7 +58,7 @@
* that the request has gone through.
* -----------------------------------------------------
*/
-plat_secondary_cold_boot_setup: ; .type plat_secondary_cold_boot_setup, %function
+func plat_secondary_cold_boot_setup
bl read_mpidr
mov x19, x0
bl platform_get_core_pos
@@ -120,7 +118,7 @@
* reset all cpus will read the same WK field
* -----------------------------------------------------
*/
-platform_get_entrypoint: ; .type platform_get_entrypoint, %function
+func platform_get_entrypoint
mov x9, x30 // lr
mov x2, x0
ldr x1, =PWRC_BASE
@@ -160,7 +158,7 @@
* BL1 will always read the mailboxes with the MMU off
* -----------------------------------------------------
*/
-platform_mem_init: ; .type platform_mem_init, %function
+func platform_mem_init
ldr x0, =TZDRAM_BASE + MBOX_OFF
stp xzr, xzr, [x0, #0]
stp xzr, xzr, [x0, #0x10]
@@ -176,7 +174,7 @@
* boot to perform early platform initialization
* -----------------------------------------------------
*/
-platform_cold_boot_init: ; .type platform_cold_boot_init, %function
+func platform_cold_boot_init
mov x20, x0
bl platform_mem_init
bl read_mpidr
diff --git a/plat/fvp/aarch64/plat_helpers.S b/plat/fvp/aarch64/plat_helpers.S
index 032b393..ab826f4 100644
--- a/plat/fvp/aarch64/plat_helpers.S
+++ b/plat/fvp/aarch64/plat_helpers.S
@@ -30,11 +30,10 @@
#include <arch.h>
#include <platform.h>
+#include <asm_macros.S>
.globl plat_report_exception
- .section .text, "ax"
-
/* ---------------------------------------------
* void plat_report_exception(unsigned int type)
* Function to report an unhandled exception
@@ -43,7 +42,7 @@
* to indicate where we are
* ---------------------------------------------
*/
-plat_report_exception:
+func plat_report_exception
mrs x1, CurrentEl
lsr x1, x1, #MODE_EL_SHIFT
lsl x1, x1, #SYS_LED_EL_SHIFT