Fix MISRA defects in some common headers
Change-Id: I8fbb4c785e7e07c7241e0c399a9b65161985c9df
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/include/common/param_header.h b/include/common/param_header.h
index a5a08ec..ec4ee4e 100644
--- a/include/common/param_header.h
+++ b/include/common/param_header.h
@@ -7,25 +7,28 @@
#ifndef __PARAM_HEADER_H__
#define __PARAM_HEADER_H__
+#include <stdbool.h>
+#include <utils_def.h>
+
/* Param header types */
-#define PARAM_EP 0x01
-#define PARAM_IMAGE_BINARY 0x02
-#define PARAM_BL31 0x03
-#define PARAM_BL_LOAD_INFO 0x04
-#define PARAM_BL_PARAMS 0x05
-#define PARAM_PSCI_LIB_ARGS 0x06
-#define PARAM_SP_IMAGE_BOOT_INFO 0x07
+#define PARAM_EP U(0x01)
+#define PARAM_IMAGE_BINARY U(0x02)
+#define PARAM_BL31 U(0x03)
+#define PARAM_BL_LOAD_INFO U(0x04)
+#define PARAM_BL_PARAMS U(0x05)
+#define PARAM_PSCI_LIB_ARGS U(0x06)
+#define PARAM_SP_IMAGE_BOOT_INFO U(0x07)
/* Param header version */
-#define VERSION_1 0x01
-#define VERSION_2 0x02
+#define VERSION_1 U(0x01)
+#define VERSION_2 U(0x02)
#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
(_p)->h.type = (uint8_t)(_type); \
(_p)->h.version = (uint8_t)(_ver); \
(_p)->h.size = (uint16_t)sizeof(*(_p)); \
(_p)->h.attr = (uint32_t)(_attr) ; \
- } while (0)
+ } while (false)
/* Following is used for populating structure members statically. */
#define SET_STATIC_PARAM_HEAD(_p, _type, _ver, _p_type, _attr) \
diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h
index 273abbe..a97914d 100644
--- a/include/common/tbbr/tbbr_img_def.h
+++ b/include/common/tbbr/tbbr_img_def.h
@@ -7,75 +7,77 @@
#ifndef __TBBR_IMG_DEF_H__
#define __TBBR_IMG_DEF_H__
+#include <utils_def.h>
+
/* Firmware Image Package */
-#define FIP_IMAGE_ID 0
+#define FIP_IMAGE_ID U(0)
/* Trusted Boot Firmware BL2 */
-#define BL2_IMAGE_ID 1
+#define BL2_IMAGE_ID U(1)
/* SCP Firmware SCP_BL2 */
-#define SCP_BL2_IMAGE_ID 2
+#define SCP_BL2_IMAGE_ID U(2)
/* EL3 Runtime Firmware BL31 */
-#define BL31_IMAGE_ID 3
+#define BL31_IMAGE_ID U(3)
/* Secure Payload BL32 (Trusted OS) */
-#define BL32_IMAGE_ID 4
+#define BL32_IMAGE_ID U(4)
/* Non-Trusted Firmware BL33 */
-#define BL33_IMAGE_ID 5
+#define BL33_IMAGE_ID U(5)
/* Certificates */
-#define TRUSTED_BOOT_FW_CERT_ID 6
-#define TRUSTED_KEY_CERT_ID 7
+#define TRUSTED_BOOT_FW_CERT_ID U(6)
+#define TRUSTED_KEY_CERT_ID U(7)
-#define SCP_FW_KEY_CERT_ID 8
-#define SOC_FW_KEY_CERT_ID 9
-#define TRUSTED_OS_FW_KEY_CERT_ID 10
-#define NON_TRUSTED_FW_KEY_CERT_ID 11
+#define SCP_FW_KEY_CERT_ID U(8)
+#define SOC_FW_KEY_CERT_ID U(9)
+#define TRUSTED_OS_FW_KEY_CERT_ID U(10)
+#define NON_TRUSTED_FW_KEY_CERT_ID U(11)
-#define SCP_FW_CONTENT_CERT_ID 12
-#define SOC_FW_CONTENT_CERT_ID 13
-#define TRUSTED_OS_FW_CONTENT_CERT_ID 14
-#define NON_TRUSTED_FW_CONTENT_CERT_ID 15
+#define SCP_FW_CONTENT_CERT_ID U(12)
+#define SOC_FW_CONTENT_CERT_ID U(13)
+#define TRUSTED_OS_FW_CONTENT_CERT_ID U(14)
+#define NON_TRUSTED_FW_CONTENT_CERT_ID U(15)
/* Non-Trusted ROM Firmware NS_BL1U */
-#define NS_BL1U_IMAGE_ID 16
+#define NS_BL1U_IMAGE_ID U(16)
/* Trusted FWU Certificate */
-#define FWU_CERT_ID 17
+#define FWU_CERT_ID U(17)
/* Trusted FWU SCP Firmware SCP_BL2U */
-#define SCP_BL2U_IMAGE_ID 18
+#define SCP_BL2U_IMAGE_ID U(18)
/* Trusted FWU Boot Firmware BL2U */
-#define BL2U_IMAGE_ID 19
+#define BL2U_IMAGE_ID U(19)
/* Non-Trusted FWU Firmware NS_BL2U */
-#define NS_BL2U_IMAGE_ID 20
+#define NS_BL2U_IMAGE_ID U(20)
/* Secure Payload BL32_EXTRA1 (Trusted OS Extra1) */
-#define BL32_EXTRA1_IMAGE_ID 21
+#define BL32_EXTRA1_IMAGE_ID U(21)
/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */
-#define BL32_EXTRA2_IMAGE_ID 22
+#define BL32_EXTRA2_IMAGE_ID U(22)
/* HW_CONFIG (e.g. Kernel DT) */
-#define HW_CONFIG_ID 23
+#define HW_CONFIG_ID U(23)
/* TB_FW_CONFIG */
-#define TB_FW_CONFIG_ID 24
+#define TB_FW_CONFIG_ID U(24)
/* SOC_FW_CONFIG */
-#define SOC_FW_CONFIG_ID 25
+#define SOC_FW_CONFIG_ID U(25)
/* TOS_FW_CONFIG */
-#define TOS_FW_CONFIG_ID 26
+#define TOS_FW_CONFIG_ID U(26)
/* NT_FW_CONFIG */
-#define NT_FW_CONFIG_ID 27
+#define NT_FW_CONFIG_ID U(27)
/* Define size of the array */
-#define MAX_NUMBER_IDS 28
+#define MAX_NUMBER_IDS U(28)
#endif /* __TBBR_IMG_DEF_H__ */
diff --git a/include/plat/arm/common/arm_config.h b/include/plat/arm/common/arm_config.h
index 02e04fd..44610bd 100644
--- a/include/plat/arm/common/arm_config.h
+++ b/include/plat/arm/common/arm_config.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -9,19 +9,21 @@
#include <stdint.h>
#include <utils_def.h>
-enum arm_config_flags {
- /* Whether Base memory map is in use */
- ARM_CONFIG_BASE_MMAP = BIT(1),
- /* Whether TZC should be configured */
- ARM_CONFIG_HAS_TZC = BIT(2),
- /* FVP model has shifted affinity */
- ARM_CONFIG_FVP_SHIFTED_AFF = BIT(3),
- /* FVP model has SMMUv3 affinity */
- ARM_CONFIG_FVP_HAS_SMMUV3 = BIT(4),
- /* FVP model has CCI (400 or 500/550) devices */
- ARM_CONFIG_FVP_HAS_CCI400 = BIT(5),
- ARM_CONFIG_FVP_HAS_CCI5XX = BIT(6),
-};
+/* Whether Base memory map is in use */
+#define ARM_CONFIG_BASE_MMAP BIT(1)
+
+/* Whether TZC should be configured */
+#define ARM_CONFIG_HAS_TZC BIT(2)
+
+/* FVP model has shifted affinity */
+#define ARM_CONFIG_FVP_SHIFTED_AFF BIT(3)
+
+/* FVP model has SMMUv3 affinity */
+#define ARM_CONFIG_FVP_HAS_SMMUV3 BIT(4)
+
+/* FVP model has CCI (400 or 500/550) devices */
+#define ARM_CONFIG_FVP_HAS_CCI400 BIT(5)
+#define ARM_CONFIG_FVP_HAS_CCI5XX BIT(6)
typedef struct arm_config {
unsigned long flags;