tree 126c48a078ea4e1236c26f4c17e68003024ea23c
parent a55d42815401fea7c98bdd4d6ad3adf7e4e9e5d5
parent 07f970d67f1a1b8d45ebdb0985ec61be01f2c7a1
author Olivier Deprez <olivier.deprez@arm.com> 1583828901 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1583828901 +0000

Merge changes from topic "tegra-downstream-02182020" into integration

* changes:
  Tegra186: store TZDRAM base/size to scratch registers
  Tegra186: add SE support to generate SHA256 of TZRAM
  Tegra186: add support for bpmp_ipc driver
  Tegra210: disable ERRATA_A57_829520
  Tegra194: memctrl: add support for MIU4 and MIU5
  Tegra194: memctrl: remove support to reconfigure MSS
  Tegra: fiq_glue: remove bakery locks from interrupt handler
  Tegra210: SE: add context save support
  Tegra210: update the PMC blacklisted registers
  Tegra: disable CPUACTLR access from lower exception levels
  cpus: denver: fixup register used to store return address