PSCI: Migrate TF to the new platform API and CM helpers

This patch migrates the rest of Trusted Firmware excluding Secure Payload and
the dispatchers to the new platform and context management API. The per-cpu
data framework APIs which took MPIDRs as their arguments are deleted and only
the ones which take core index as parameter are retained.

Change-Id: I839d05ad995df34d2163a1cfed6baa768a5a595d
diff --git a/include/bl31/cpu_data.h b/include/bl31/cpu_data.h
index db702ba..2b506c7 100644
--- a/include/bl31/cpu_data.h
+++ b/include/bl31/cpu_data.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -103,7 +103,6 @@
 		assert_cpu_data_cpu_ops_ptr_offset_mismatch);
 
 struct cpu_data *_cpu_data_by_index(uint32_t cpu_index);
-struct cpu_data *_cpu_data_by_mpidr(uint64_t mpidr);
 
 /* Return the cpu_data structure for the current CPU. */
 static inline struct cpu_data *_cpu_data(void)
@@ -123,8 +122,6 @@
 #define set_cpu_data(_m, _v)		   _cpu_data()->_m = _v
 #define get_cpu_data_by_index(_ix, _m)	   _cpu_data_by_index(_ix)->_m
 #define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v
-#define get_cpu_data_by_mpidr(_id, _m)	   _cpu_data_by_mpidr(_id)->_m
-#define set_cpu_data_by_mpidr(_id, _m, _v) _cpu_data_by_mpidr(_id)->_m = _v
 
 #define flush_cpu_data(_m)	   flush_dcache_range((uint64_t) 	  \
 						      &(_cpu_data()->_m), \
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S
index eb033a6..3b96081 100644
--- a/include/common/el3_common_macros.S
+++ b/include/common/el3_common_macros.S
@@ -164,8 +164,7 @@
 		 * then it means it is a warm boot so jump to this address.
 		 * -------------------------------------------------------------
 		 */
-		mrs	x0, mpidr_el1
-		bl	platform_get_entrypoint
+		bl	plat_get_my_entrypoint
 		cbz	x0, do_cold_boot
 		br	x0
 
@@ -181,8 +180,7 @@
 		 * of that state and allows entry into the OS.
 		 * -------------------------------------------------------------
 		 */
-		mrs	x0, mpidr_el1
-		bl	platform_is_primary_cpu
+		bl	plat_is_my_cpu_primary
 		cbnz	x0, do_primary_cold_boot
 
 		/* This is a cold boot on a secondary CPU */
@@ -249,8 +247,7 @@
 	 * moment.
 	 * ---------------------------------------------------------------------
 	 */
-	mrs	x0, mpidr_el1
-	bl	platform_set_stack
+	bl	plat_set_my_stack
 	.endm
 
 #endif /* __EL3_COMMON_MACROS_S__ */