commit 361f73c3fc0d24f3eaf1ae299359c5a255852576
author Dimitris Papastamos <dimitris.papastamos@arm.com> Wed Mar 13 13:59:00 2019 +0000
committer GitHub <noreply@github.com> Wed Mar 13 13:59:00 2019 +0000
tree 7c37b5fca9ff22480c9dbd5f363995396aa82997
parent 13ea87b12b01e39eee6abd07195d826a4add6ba7
parent adfa8b0e744d05198cba05a8e34b25fe4ce202df

Merge pull request #1877 from bryanodonoghue/integration+bl2-el3-eret-fix-v2

bl2-el3: Fix exit to bl32 by ensuring full write to SPSR

bl1/aarch32/bl1_exceptions.S

diff --git a/bl1/aarch32/bl1_exceptions.S b/bl1/aarch32/bl1_exceptions.S
index 6728278..f2af9ab 100644
--- a/bl1/aarch32/bl1_exceptions.S
+++ b/bl1/aarch32/bl1_exceptions.S
@@ -71,7 +71,7 @@
 	 */
 	ldr	lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET]
 	ldr	r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)]
-	msr	spsr, r1
+	msr	spsr_xc, r1
 
 	/* Some BL32 stages expect lr_svc to provide the BL33 entry address */
 	cps	#MODE32_svc

bl2/aarch32/bl2_el3_entrypoint.S

diff --git a/bl2/aarch32/bl2_el3_entrypoint.S b/bl2/aarch32/bl2_el3_entrypoint.S
index 35da133..9b4da6b 100644
--- a/bl2/aarch32/bl2_el3_entrypoint.S
+++ b/bl2/aarch32/bl2_el3_entrypoint.S
@@ -78,7 +78,7 @@
 	 */
 	ldr	lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET]
 	ldr	r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)]
-	msr	spsr, r1
+	msr	spsr_xc, r1
 
 	/* Some BL32 stages expect lr_svc to provide the BL33 entry address */
 	cps	#MODE32_svc