commit 33a0de73f787b4eac7445ec2842625766f32795a
author Sieu Mun Tang <sieu.mun.tang@intel.com> Tue Aug 01 13:43:26 2023 +0800
committer Jit Loon Lim <jit.loon.lim@intel.com> Fri Nov 03 21:16:24 2023 +0800
tree 785aeb59cbc0b4671a134602368661ed9119ecbd
parent 1165717bcba28cb0ad85c95bbd03c96771620af1

fix(intel): temporarily workaround for Zephyr SMP

Temporarily workaround for Zephyr SMP testing.

Change-Id: I9d2d209e9f384d079f0311b3a8b0b760e0566877
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>

plat/intel/soc/agilex5/bl2_plat_setup.c

diff --git a/plat/intel/soc/agilex5/bl2_plat_setup.c b/plat/intel/soc/agilex5/bl2_plat_setup.c
index a2fafd2..3912ba8 100644
--- a/plat/intel/soc/agilex5/bl2_plat_setup.c
+++ b/plat/intel/soc/agilex5/bl2_plat_setup.c
@@ -84,7 +84,8 @@
 	PLAT_BAUDRATE, &console);
 
 	/* Store magic number */
-	mmio_write_32(L2_RESET_DONE_REG, PLAT_L2_RESET_REQ);
+	// TODO: Temp workaround to ungate testing
+	// mmio_write_32(L2_RESET_DONE_REG, PLAT_L2_RESET_REQ);
 }
 
 void bl2_el3_plat_arch_setup(void)