diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v10.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v10.c
index 0b93e15..1fb43a7 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v10.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v10.c
@@ -68,17 +68,15 @@
 	io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
 
 	/* QOSBW SRAM setting */
-	for (uint32_t i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-		io_write_64(QOSBW_FIX_QOS_BANK0 + mstat_fix[i].addr,
-			mstat_fix[i].value);
-		io_write_64(QOSBW_FIX_QOS_BANK1 + mstat_fix[i].addr,
-			mstat_fix[i].value);
+	uint32_t i;
+
+	for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+		io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+		io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
 	}
-	for (uint32_t i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-		io_write_64(QOSBW_BE_QOS_BANK0 + mstat_be[i].addr,
-			mstat_be[i].value);
-		io_write_64(QOSBW_BE_QOS_BANK1 + mstat_be[i].addr,
-			mstat_be[i].value);
+	for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+		io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+		io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
 	}
 
 	/* 3DG bus Leaf setting */