feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
With the /omit-if-no-ref/ keyword in DT, the non-referenced nodes
are just removed. This allows reducing the size of device tree blobs.
Setting it before pins node allows a size reduction of more than 2kB.
The corresponding nodes can also be removed from BL2 and BL32 DT
overlays.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6b4a4d227d5592e1d253a1b35da2dafaac2ddcae
diff --git a/fdts/stm32mp13-bl2.dtsi b/fdts/stm32mp13-bl2.dtsi
index 836e9ae..06db796 100644
--- a/fdts/stm32mp13-bl2.dtsi
+++ b/fdts/stm32mp13-bl2.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
+ * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
*/
/ {
@@ -32,13 +32,6 @@
#if !STM32MP_USB_PROGRAMMER
/delete-node/ usbphyc@5a006000;
#endif
-
- pinctrl@50002000 {
-#if !STM32MP_EMMC && !STM32MP_SDMMC
- /delete-node/ sdmmc1-b4-0;
- /delete-node/ sdmmc2-b4-0;
-#endif
- };
};
/*
diff --git a/fdts/stm32mp13-pinctrl.dtsi b/fdts/stm32mp13-pinctrl.dtsi
index 879da9c..0129372 100644
--- a/fdts/stm32mp13-pinctrl.dtsi
+++ b/fdts/stm32mp13-pinctrl.dtsi
@@ -1,12 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
+ * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
- i2c4_pins_a: i2c4-0 {
+ /omit-if-no-ref/ i2c4_pins_a: i2c4-0 {
pins {
pinmux = <STM32_PINMUX('E', 15, AF6)>, /* I2C4_SCL */
<STM32_PINMUX('B', 9, AF6)>; /* I2C4_SDA */
@@ -16,7 +16,7 @@
};
};
- sdmmc1_b4_pins_a: sdmmc1-b4-0 {
+ /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
@@ -29,7 +29,7 @@
};
};
- sdmmc1_clk_pins_a: sdmmc1-clk-0 {
+ /omit-if-no-ref/ sdmmc1_clk_pins_a: sdmmc1-clk-0 {
pins {
pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
slew-rate = <1>;
@@ -38,7 +38,7 @@
};
};
- sdmmc2_b4_pins_a: sdmmc2-b4-0 {
+ /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
@@ -51,7 +51,7 @@
};
};
- sdmmc2_clk_pins_a: sdmmc2-clk-0 {
+ /omit-if-no-ref/ sdmmc2_clk_pins_a: sdmmc2-clk-0 {
pins {
pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
slew-rate = <1>;
@@ -60,7 +60,7 @@
};
};
- uart4_pins_a: uart4-0 {
+ /omit-if-no-ref/ uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
bias-disable;
@@ -73,7 +73,7 @@
};
};
- usart1_pins_a: usart1-0 {
+ /omit-if-no-ref/ usart1_pins_a: usart1-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
<STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
@@ -88,7 +88,7 @@
};
};
- uart8_pins_a: uart8-0 {
+ /omit-if-no-ref/ uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
bias-disable;
diff --git a/fdts/stm32mp15-bl2.dtsi b/fdts/stm32mp15-bl2.dtsi
index 5489a62..f956b05 100644
--- a/fdts/stm32mp15-bl2.dtsi
+++ b/fdts/stm32mp15-bl2.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (C) STMicroelectronics 2020-2022 - All Rights Reserved
+ * Copyright (c) 2020-2023, STMicroelectronics - All Rights Reserved
*/
/ {
@@ -45,28 +45,6 @@
/delete-node/ stgen@5c008000;
/delete-node/ i2c@5c009000;
/delete-node/ tamp@5c00a000;
-
- pinctrl@50002000 {
-#if !STM32MP_RAW_NAND
- /delete-node/ fmc-0;
-#endif
-#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR
- /delete-node/ qspi-clk-0;
- /delete-node/ qspi-bk1-0;
- /delete-node/ qspi-bk2-0;
-#endif
-#if !STM32MP_EMMC && !STM32MP_SDMMC
- /delete-node/ sdmmc1-b4-0;
- /delete-node/ sdmmc1-dir-0;
- /delete-node/ sdmmc2-b4-0;
- /delete-node/ sdmmc2-b4-1;
- /delete-node/ sdmmc2-d47-0;
-#endif
-#if !STM32MP_USB_PROGRAMMER
- /delete-node/ usbotg_hs-0;
- /delete-node/ usbotg-fs-dp-dm-0;
-#endif
- };
};
/*
diff --git a/fdts/stm32mp15-bl32.dtsi b/fdts/stm32mp15-bl32.dtsi
index 31b24f6..c5a815e 100644
--- a/fdts/stm32mp15-bl32.dtsi
+++ b/fdts/stm32mp15-bl32.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (C) STMicroelectronics 2020-2021 - All Rights Reserved
+ * Copyright (c) 2020-2023, STMicroelectronics - All Rights Reserved
*/
/ {
@@ -26,21 +26,5 @@
/delete-node/ spi@5c001000;
/delete-node/ stgen@5c008000;
/delete-node/ i2c@5c009000;
-
- pinctrl@50002000 {
- /delete-node/ fmc-0;
- /delete-node/ qspi-clk-0;
- /delete-node/ qspi-bk1-0;
- /delete-node/ qspi-bk2-0;
- /delete-node/ sdmmc1-b4-0;
- /delete-node/ sdmmc1-dir-0;
- /delete-node/ sdmmc2-b4-0;
- /delete-node/ sdmmc2-b4-1;
- /delete-node/ sdmmc2-d47-0;
- /delete-node/ sdmmc2-d47-1;
- /delete-node/ sdmmc2-d47-3;
- /delete-node/ usbotg_hs-0;
- /delete-node/ usbotg-fs-dp-dm-0;
- };
};
};
diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi
index 7d2be0b..8dc00fe 100644
--- a/fdts/stm32mp15-pinctrl.dtsi
+++ b/fdts/stm32mp15-pinctrl.dtsi
@@ -1,12 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
- fmc_pins_a: fmc-0 {
+ /omit-if-no-ref/ fmc_pins_a: fmc-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
@@ -31,7 +31,7 @@
};
};
- i2c2_pins_a: i2c2-0 {
+ /omit-if-no-ref/ i2c2_pins_a: i2c2-0 {
pins {
pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
<STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
@@ -41,7 +41,7 @@
};
};
- qspi_clk_pins_a: qspi-clk-0 {
+ /omit-if-no-ref/ qspi_clk_pins_a: qspi-clk-0 {
pins {
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
bias-disable;
@@ -50,7 +50,7 @@
};
};
- qspi_bk1_pins_a: qspi-bk1-0 {
+ /omit-if-no-ref/ qspi_bk1_pins_a: qspi-bk1-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
@@ -68,7 +68,7 @@
};
};
- qspi_bk2_pins_a: qspi-bk2-0 {
+ /omit-if-no-ref/ qspi_bk2_pins_a: qspi-bk2-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
<STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
@@ -86,7 +86,7 @@
};
};
- sdmmc1_b4_pins_a: sdmmc1-b4-0 {
+ /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
@@ -105,7 +105,7 @@
};
};
- sdmmc1_dir_pins_a: sdmmc1-dir-0 {
+ /omit-if-no-ref/ sdmmc1_dir_pins_a: sdmmc1-dir-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
@@ -120,7 +120,7 @@
};
};
- sdmmc1_dir_pins_b: sdmmc1-dir-1 {
+ /omit-if-no-ref/ sdmmc1_dir_pins_b: sdmmc1-dir-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
@@ -135,7 +135,7 @@
};
};
- sdmmc2_b4_pins_a: sdmmc2-b4-0 {
+ /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
@@ -154,7 +154,7 @@
};
};
- sdmmc2_b4_pins_b: sdmmc2-b4-1 {
+ /omit-if-no-ref/ sdmmc2_b4_pins_b: sdmmc2-b4-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
@@ -173,7 +173,7 @@
};
};
- sdmmc2_d47_pins_a: sdmmc2-d47-0 {
+ /omit-if-no-ref/ sdmmc2_d47_pins_a: sdmmc2-d47-0 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
@@ -185,7 +185,7 @@
};
};
- sdmmc2_d47_pins_b: sdmmc2-d47-1 {
+ /omit-if-no-ref/ sdmmc2_d47_pins_b: sdmmc2-d47-1 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
@@ -197,7 +197,7 @@
};
};
- sdmmc2_d47_pins_c: sdmmc2-d47-2 {
+ /omit-if-no-ref/ sdmmc2_d47_pins_c: sdmmc2-d47-2 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
@@ -209,7 +209,7 @@
};
};
- sdmmc2_d47_pins_d: sdmmc2-d47-3 {
+ /omit-if-no-ref/ sdmmc2_d47_pins_d: sdmmc2-d47-3 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
@@ -218,7 +218,7 @@
};
};
- uart4_pins_a: uart4-0 {
+ /omit-if-no-ref/ uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
bias-disable;
@@ -231,7 +231,7 @@
};
};
- uart4_pins_b: uart4-1 {
+ /omit-if-no-ref/ uart4_pins_b: uart4-1 {
pins1 {
pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
bias-disable;
@@ -244,7 +244,7 @@
};
};
- uart7_pins_a: uart7-0 {
+ /omit-if-no-ref/ uart7_pins_a: uart7-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
bias-disable;
@@ -259,7 +259,7 @@
};
};
- uart7_pins_b: uart7-1 {
+ /omit-if-no-ref/ uart7_pins_b: uart7-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
bias-disable;
@@ -272,7 +272,7 @@
};
};
- uart7_pins_c: uart7-2 {
+ /omit-if-no-ref/ uart7_pins_c: uart7-2 {
pins1 {
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
bias-disable;
@@ -285,7 +285,7 @@
};
};
- uart8_pins_a: uart8-0 {
+ /omit-if-no-ref/ uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
bias-disable;
@@ -298,7 +298,7 @@
};
};
- usart2_pins_a: usart2-0 {
+ /omit-if-no-ref/ usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
@@ -313,7 +313,7 @@
};
};
- usart2_pins_b: usart2-1 {
+ /omit-if-no-ref/ usart2_pins_b: usart2-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
<STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
@@ -328,7 +328,7 @@
};
};
- usart2_pins_c: usart2-2 {
+ /omit-if-no-ref/ usart2_pins_c: usart2-2 {
pins1 {
pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
@@ -343,7 +343,7 @@
};
};
- usart3_pins_a: usart3-0 {
+ /omit-if-no-ref/ usart3_pins_a: usart3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
bias-disable;
@@ -356,7 +356,7 @@
};
};
- usart3_pins_b: usart3-1 {
+ /omit-if-no-ref/ usart3_pins_b: usart3-1 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
@@ -371,7 +371,7 @@
};
};
- usart3_pins_c: usart3-2 {
+ /omit-if-no-ref/ usart3_pins_c: usart3-2 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
<STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
@@ -386,13 +386,13 @@
};
};
- usbotg_hs_pins_a: usbotg-hs-0 {
+ /omit-if-no-ref/ usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
};
};
- usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
+ /omit-if-no-ref/ usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
pins {
pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
<STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
@@ -401,7 +401,7 @@
};
&pinctrl_z {
- i2c4_pins_a: i2c4-0 {
+ /omit-if-no-ref/ i2c4_pins_a: i2c4-0 {
pins {
pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
<STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */