diff --git a/plat/intel/soc/agilex/aarch64/plat_helpers.S b/plat/intel/soc/agilex/aarch64/plat_helpers.S
deleted file mode 100644
index b3f5a5e..0000000
--- a/plat/intel/soc/agilex/aarch64/plat_helpers.S
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arch.h>
-#include <asm_macros.S>
-#include <cpu_macros.S>
-#include <platform_def.h>
-
-	.globl	plat_secondary_cold_boot_setup
-	.globl	platform_is_primary_cpu
-	.globl	plat_is_my_cpu_primary
-	.globl	plat_my_core_pos
-	.globl	plat_crash_console_init
-	.globl	plat_crash_console_putc
-	.globl  plat_crash_console_flush
-	.globl	platform_mem_init
-
-	.globl plat_get_my_entrypoint
-
-	/* -----------------------------------------------------
-	 * void plat_secondary_cold_boot_setup (void);
-	 *
-	 * This function performs any platform specific actions
-	 * needed for a secondary cpu after a cold reset e.g
-	 * mark the cpu's presence, mechanism to place it in a
-	 * holding pen etc.
-	 * -----------------------------------------------------
-	 */
-func plat_secondary_cold_boot_setup
-	/* Wait until the it gets reset signal from rstmgr gets populated */
-poll_mailbox:
-	wfi
-
-	mov_imm	x0, PLAT_AGX_SEC_ENTRY
-	ldr	x1, [x0]
-	mov_imm	x2, PLAT_CPUID_RELEASE
-	ldr	x3, [x2]
-	mrs	x4, mpidr_el1
-	and	x4, x4, #0xff
-	cmp	x3, x4
-	b.ne	poll_mailbox
-	br	x1
-endfunc plat_secondary_cold_boot_setup
-
-func platform_is_primary_cpu
-	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
-	cmp	x0, #PLAT_PRIMARY_CPU
-	cset	x0, eq
-	ret
-endfunc platform_is_primary_cpu
-
-func plat_is_my_cpu_primary
-	mrs	x0, mpidr_el1
-	b   platform_is_primary_cpu
-endfunc plat_is_my_cpu_primary
-
-func plat_my_core_pos
-	mrs	x0, mpidr_el1
-	and	x1, x0, #MPIDR_CPU_MASK
-	and	x0, x0, #MPIDR_CLUSTER_MASK
-	add	x0, x1, x0, LSR #6
-	ret
-endfunc plat_my_core_pos
-
-func plat_get_my_entrypoint
-	mov_imm	x1, PLAT_AGX_SEC_ENTRY
-	ldr	x0, [x1]
-	ret
-endfunc plat_get_my_entrypoint
-
-	/* ---------------------------------------------
-	 * int plat_crash_console_init(void)
-	 * Function to initialize the crash console
-	 * without a C Runtime to print crash report.
-	 * Clobber list : x0, x1, x2
-	 * ---------------------------------------------
-	 */
-func plat_crash_console_init
-	mov_imm	x0, PLAT_UART0_BASE
-	mov_imm	x1, PLAT_UART_CLOCK
-	mov_imm	x2, PLAT_BAUDRATE
-	b	console_16550_core_init
-endfunc plat_crash_console_init
-
-	/* ---------------------------------------------
-	 * int plat_crash_console_putc(void)
-	 * Function to print a character on the crash
-	 * console without a C Runtime.
-	 * Clobber list : x1, x2
-	 * ---------------------------------------------
-	 */
-func plat_crash_console_putc
-	mov_imm x1, PLAT_UART0_BASE
-	b	console_16550_core_putc
-endfunc plat_crash_console_putc
-
-func plat_crash_console_flush
-	mov_imm x0, CRASH_CONSOLE_BASE
-	b	console_16550_core_flush
-endfunc plat_crash_console_flush
-
-
-	/* --------------------------------------------------------
-	 * void platform_mem_init (void);
-	 *
-	 * Any memory init, relocation to be done before the
-	 * platform boots. Called very early in the boot process.
-	 * --------------------------------------------------------
-	 */
-func platform_mem_init
-	mov	x0, #0
-	ret
-endfunc platform_mem_init
diff --git a/plat/intel/soc/agilex/aarch64/platform_common.c b/plat/intel/soc/agilex/aarch64/platform_common.c
deleted file mode 100644
index 6d3d817..0000000
--- a/plat/intel/soc/agilex/aarch64/platform_common.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arch.h>
-#include <arch_helpers.h>
-#include <platform_def.h>
-#include <plat/common/platform.h>
-#include <socfpga_private.h>
-
-
-unsigned int plat_get_syscnt_freq2(void)
-{
-	return PLAT_SYS_COUNTER_FREQ_IN_TICKS;
-}
-
-unsigned long socfpga_get_ns_image_entrypoint(void)
-{
-	return PLAT_NS_IMAGE_OFFSET;
-}
-
-/******************************************************************************
- * Gets SPSR for BL32 entry
- *****************************************************************************/
-uint32_t socfpga_get_spsr_for_bl32_entry(void)
-{
-	/*
-	 * The Secure Payload Dispatcher service is responsible for
-	 * setting the SPSR prior to entry into the BL32 image.
-	 */
-	return 0;
-}
-
-/******************************************************************************
- * Gets SPSR for BL33 entry
- *****************************************************************************/
-uint32_t socfpga_get_spsr_for_bl33_entry(void)
-{
-	unsigned long el_status;
-	unsigned int mode;
-	uint32_t spsr;
-
-	/* Figure out what mode we enter the non-secure world in */
-	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
-	el_status &= ID_AA64PFR0_ELX_MASK;
-
-	mode = (el_status) ? MODE_EL2 : MODE_EL1;
-
-	/*
-	 * TODO: Consider the possibility of specifying the SPSR in
-	 * the FIP ToC and allowing the platform to have a say as
-	 * well.
-	 */
-	spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
-	return spsr;
-}
-
diff --git a/plat/intel/soc/agilex/include/plat_macros.S b/plat/intel/soc/agilex/include/plat_macros.S
deleted file mode 100644
index 43db9a2..0000000
--- a/plat/intel/soc/agilex/include/plat_macros.S
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (c) 2019, Intel Corporation. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_MACROS_S
-#define PLAT_MACROS_S
-
-#include <platform_def.h>
-
-	/* ---------------------------------------------
-	 * The below required platform porting macro
-	 * prints out relevant platform registers
-	 * whenever an unhandled exception is taken in
-	 * BL31.
-	 * ---------------------------------------------
-	 */
-	.macro plat_crash_print_regs
-	.endm
-
-#endif /* PLAT_MACROS_S */
diff --git a/plat/intel/soc/agilex/include/platform_def.h b/plat/intel/soc/agilex/include/platform_def.h
index 10f7338..277862a 100644
--- a/plat/intel/soc/agilex/include/platform_def.h
+++ b/plat/intel/soc/agilex/include/platform_def.h
@@ -15,7 +15,7 @@
 
 
 #define PLAT_CPUID_RELEASE			0xffe1b000
-#define PLAT_AGX_SEC_ENTRY			0xffe1b008
+#define PLAT_SEC_ENTRY				0xffe1b008
 
 /* Define next boot image name and offset */
 #define PLAT_NS_IMAGE_OFFSET			0x50000
diff --git a/plat/intel/soc/agilex/include/socfpga_private.h b/plat/intel/soc/agilex/include/socfpga_private.h
deleted file mode 100644
index 6ab1409..0000000
--- a/plat/intel/soc/agilex/include/socfpga_private.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2019, Intel Corporation. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLATFORM_PRIVATE_H
-#define PLATFORM_PRIVATE_H
-
-/*******************************************************************************
- * Function and variable prototypes
- ******************************************************************************/
-void socfgpa_configure_mmu_el3(unsigned long total_base,
-			unsigned long total_size,
-			unsigned long ro_start,
-			unsigned long ro_limit,
-			unsigned long coh_start,
-			unsigned long coh_limit);
-
-
-void socfpga_configure_mmu_el1(unsigned long total_base,
-			unsigned long total_size,
-			unsigned long ro_start,
-			unsigned long ro_limit,
-			unsigned long coh_start,
-			unsigned long coh_limit);
-
-void socfpga_delay_timer_init(void);
-
-void socfpga_gic_driver_init(void);
-
-uint32_t socfpga_get_spsr_for_bl32_entry(void);
-
-uint32_t socfpga_get_spsr_for_bl33_entry(void);
-
-unsigned long socfpga_get_ns_image_entrypoint(void);
-
-
-#endif /* PLATFORM_PRIVATE_H */
diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk
index c13709a..5d20462 100644
--- a/plat/intel/soc/agilex/platform.mk
+++ b/plat/intel/soc/agilex/platform.mk
@@ -7,7 +7,8 @@
 #
 PLAT_INCLUDES		:=	\
 			-Iplat/intel/soc/agilex/include/		\
-			-Iplat/intel/soc/common/drivers/
+			-Iplat/intel/soc/common/drivers/		\
+			-Iplat/intel/soc/common/include/
 
 PLAT_BL_COMMON_SOURCES	:=	\
 			drivers/arm/gic/common/gic_common.c		\
@@ -19,8 +20,8 @@
 			lib/xlat_tables/aarch64/xlat_tables.c 		\
 			lib/xlat_tables/xlat_tables_common.c 		\
 			plat/common/plat_gicv2.c			\
-			plat/intel/soc/agilex/aarch64/platform_common.c \
-			plat/intel/soc/agilex/aarch64/plat_helpers.S	\
+			plat/intel/soc/common/aarch64/platform_common.c \
+			plat/intel/soc/common/aarch64/plat_helpers.S
 
 BL2_SOURCES     +=	\
 		common/desc_image_load.c				\
diff --git a/plat/intel/soc/agilex/socfpga_psci.c b/plat/intel/soc/agilex/socfpga_psci.c
index 411e89b..04d8a0e 100644
--- a/plat/intel/soc/agilex/socfpga_psci.c
+++ b/plat/intel/soc/agilex/socfpga_psci.c
@@ -17,7 +17,7 @@
 #define AGX_RSTMGR_OFST			0xffd11000
 #define AGX_RSTMGR_MPUMODRST_OFST	0x20
 
-uintptr_t *agilex_sec_entry = (uintptr_t *) PLAT_AGX_SEC_ENTRY;
+uintptr_t *agilex_sec_entry = (uintptr_t *) PLAT_SEC_ENTRY;
 uintptr_t *cpuid_release = (uintptr_t *) PLAT_CPUID_RELEASE;
 
 /*******************************************************************************