n1sdp: introduce platform information SDS region
Platform information structure holds information about platform's DDR
size(local/remote) which will be used to zero out the memory before
enabling the ECC capability as well as information about multichip
setup. Multichip and remote DDR information can only be probed in SCP,
SDS region will be used by TF-A to get this information at boot up.
This patch introduces a new SDS to store platform information, which is
populated dynamically by SCP Firmware.previously used mem_info SDS is
also made part of this structure itself.
The platform information is also passed to BL33 by copying it to Non-
Secure SRAM.
Change-Id: I4781dc6a7232c3c0a3219b164d943ce9e3e469ee
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
diff --git a/plat/arm/board/n1sdp/n1sdp_def.h b/plat/arm/board/n1sdp/n1sdp_def.h
index d43c5a4..574cdc9 100644
--- a/plat/arm/board/n1sdp/n1sdp_def.h
+++ b/plat/arm/board/n1sdp/n1sdp_def.h
@@ -15,10 +15,12 @@
N1SDP_NS_SRAM_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
-/* SDS memory information defines */
-#define N1SDP_SDS_MEM_INFO_STRUCT_ID 8
-#define N1SDP_SDS_MEM_INFO_OFFSET 0
-#define N1SDP_SDS_MEM_INFO_SIZE 4
+/* SDS Platform information defines */
+#define N1SDP_SDS_PLATFORM_INFO_STRUCT_ID 8
+#define N1SDP_SDS_PLATFORM_INFO_OFFSET 0
+#define N1SDP_SDS_PLATFORM_INFO_SIZE 4
+#define N1SDP_MAX_DDR_CAPACITY_GB 64
+#define N1SDP_MAX_SLAVE_COUNT 16
/* SDS BL33 image information defines */
#define N1SDP_SDS_BL33_INFO_STRUCT_ID 9
@@ -40,7 +42,7 @@
/* DMC ECC enable bit in ERR0CTLR0 register */
#define N1SDP_DMC_ERR0CTLR0_ECC_EN 0x1
-/* Base address of non-secure SRAM where DDR memory size will be filled */
-#define N1SDP_DDR_MEM_INFO_BASE 0x06008000
+/* Base address of non-secure SRAM where Platform information will be filled */
+#define N1SDP_PLATFORM_INFO_BASE 0x06008000
#endif /* N1SDP_DEF_H */