diff --git a/plat/arm/board/arm_fpga/fpga_bl31_setup.c b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
index d499379..6329497 100644
--- a/plat/arm/board/arm_fpga/fpga_bl31_setup.c
+++ b/plat/arm/board/arm_fpga/fpga_bl31_setup.c
@@ -56,7 +56,6 @@
 
 	/* Write frequency to CNTCRL and initialize timer */
 	generic_delay_timer_init();
-	mmio_write_32(FPGA_TIMER_BASE, ((1 << 8) | 1UL));
 }
 
 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
diff --git a/plat/arm/board/arm_fpga/fpga_def.h b/plat/arm/board/arm_fpga/fpga_def.h
index 56ee166..dbdbe6f 100644
--- a/plat/arm/board/arm_fpga/fpga_def.h
+++ b/plat/arm/board/arm_fpga/fpga_def.h
@@ -36,6 +36,5 @@
 #define PLAT_FPGA_CRASH_UART_CLK_IN_HZ		PLAT_FPGA_BOOT_UART_CLK_IN_HZ
 
 #define FPGA_TIMER_FREQUENCY			10000000
-#define FPGA_TIMER_BASE				0x2a830000
 
 #endif