tree ff802f60d9364b3f74eb220577fe6e5970dffcd5
parent 7ed3846ce4d6ed43b7767ec7537ebfd3941d0663
parent dc9fb931ee56e8ae74f447c34f6d61307e56cd5e
author Joanna Farley <joanna.farley@arm.com> 1632652838 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1632652838 +0200

Merge changes I9c7cc586,I48ee254a,I9f65c6af,I5872d95b,I2dbbdcb4, ... into integration

* changes:
  feat(docs/nxp/layerscape): add ls1028a soc and board support
  feat(plat/nxp/ls1028ardb): add ls1028ardb board support
  feat(plat/nxp/ls1028a): add ls1028a soc support
  feat(plat/nxp/common): define default SD buffer
  feat(driver/nxp/xspi): add MT35XU02G flash info
  feat(plat/nxp/common): add SecMon register definition for ch_3_2
  feat(driver/nxp/dcfg): define RSTCR_RESET_REQ
  feat(plat/nxp/common/psci): define CPUECTLR_TIMER_2TICKS
  feat(plat/nxp/common): define default PSCI features if not defined
  feat(plat/nxp/common): define common macro for ARM registers
  feat(plat/nxp/common): add CCI and EPU address definition