feat(imx8ulp): add some delay before cmc1 access
When resume from APD sleep mode, need to add a small delay
before accessing the CMC1 register.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: Ic8acdf58a3bf82b1791e7ae7f173f8c94c56b49d
diff --git a/plat/imx/imx8ulp/imx8ulp_psci.c b/plat/imx/imx8ulp/imx8ulp_psci.c
index 3a36332..628acea 100644
--- a/plat/imx/imx8ulp/imx8ulp_psci.c
+++ b/plat/imx/imx8ulp/imx8ulp_psci.c
@@ -10,6 +10,7 @@
#include <arch_helpers.h>
#include <common/debug.h>
#include <drivers/arm/gicv3.h>
+#include <drivers/delay_timer.h>
#include <lib/mmio.h>
#include <lib/psci/psci.h>
@@ -404,6 +405,12 @@
;
}
+ /*
+ * when resume from low power mode, need to delay for a while
+ * before access the CMC register.
+ */
+ udelay(5);
+
/* clear cluster's LPM setting. */
mmio_write_32(IMX_CMC1_BASE + 0x20, 0x0);
mmio_write_32(IMX_CMC1_BASE + 0x10, 0x0);