rcar_gen3: plat: Fix BL2 size check

Rename BL2_LIMIT to BL2_IMAGE_LIMIT and BL2_SYSRAM_LIMIT to BL2_LIMIT to
correctly set BL2_LIMIT value. Set correct DEVICE_SRAM_BASE to match the
hardware. Use BL2_END in rcar_configure_mmu_el3() to mark the cacheable
BL2 area.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
diff --git a/plat/renesas/rcar/include/rcar_def.h b/plat/renesas/rcar/include/rcar_def.h
index 242e007..3dbd3f5 100644
--- a/plat/renesas/rcar/include/rcar_def.h
+++ b/plat/renesas/rcar/include/rcar_def.h
@@ -24,7 +24,7 @@
 #define DEVICE_RCAR_SIZE		U(0x00300000)
 #define DEVICE_RCAR_BASE2		U(0xE6360000)
 #define DEVICE_RCAR_SIZE2		U(0x19CA0000)
-#define DEVICE_SRAM_BASE		U(0xE6310000)
+#define DEVICE_SRAM_BASE		U(0xE6300000)
 #define DEVICE_SRAM_SIZE		U(0x00002000)
 #define DEVICE_SRAM_STACK_BASE		(DEVICE_SRAM_BASE + DEVICE_SRAM_SIZE)
 #define DEVICE_SRAM_STACK_SIZE		U(0x00001000)