diff --git a/plat/fvp/fvp_topology.c b/plat/fvp/fvp_topology.c
index cf21503..49f7daf 100644
--- a/plat/fvp/fvp_topology.c
+++ b/plat/fvp/fvp_topology.c
@@ -180,7 +180,7 @@
  * Handy optimization to prevent the psci implementation from traversing through
  * affinity levels which are not present while detecting the platform topology.
  ******************************************************************************/
-int plat_get_max_afflvl()
+int plat_get_max_afflvl(void)
 {
 	return MPIDR_AFFLVL1;
 }
@@ -190,7 +190,7 @@
  * the FVP flavour its running on. We construct all the mpidrs we can handle
  * and rely on the PWRC.PSYSR to flag absent cpus when their status is queried.
  ******************************************************************************/
-int fvp_setup_topology()
+int fvp_setup_topology(void)
 {
 	unsigned char aff0, aff1, aff_state, aff0_offset = 0;
 	unsigned long mpidr;