commit 2d552402c80666ee0e071a1d02a3439bdf74ec2f
author Juan Castillo <juan.castillo@arm.com> Fri Jun 13 17:05:10 2014 +0100
committer Juan Castillo <juan.castillo@arm.com> Tue Jun 24 12:50:00 2014 +0100
tree 82c3050940f816e3de424958d23bfa691b44b152
parent fb060949f9d38184547ea339f730e8b011164575

Remove all checkpatch errors from codebase

Exclude stdlib files because they do not follow kernel code style.

Fixes ARM-software/tf-issues#73

Change-Id: I4cfafa38ab436f5ab22c277cb38f884346a267ab

bl32/tsp/tsp_interrupt.c

diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c
index 4a4b877..ff6bdc5 100644
--- a/bl32/tsp/tsp_interrupt.c
+++ b/bl32/tsp/tsp_interrupt.c
@@ -72,7 +72,7 @@
  * architecture version in v2.0 and the secure physical timer interrupt is the
  * only S-EL1 interrupt that it needs to handle.
  ******************************************************************************/
-int32_t tsp_fiq_handler()
+int32_t tsp_fiq_handler(void)
 {
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr), id;
@@ -109,7 +109,7 @@
 	return 0;
 }
 
-int32_t tsp_irq_received()
+int32_t tsp_irq_received(void)
 {
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);

bl32/tsp/tsp_timer.c

diff --git a/bl32/tsp/tsp_timer.c b/bl32/tsp/tsp_timer.c
index 366640f..a7fdfda 100644
--- a/bl32/tsp/tsp_timer.c
+++ b/bl32/tsp/tsp_timer.c
@@ -46,7 +46,7 @@
 /*******************************************************************************
  * This function initializes the generic timer to fire every 0.5 second
  ******************************************************************************/
-void tsp_generic_timer_start()
+void tsp_generic_timer_start(void)
 {
 	uint64_t cval;
 	uint32_t ctl = 0;
@@ -63,7 +63,7 @@
 /*******************************************************************************
  * This function deasserts the timer interrupt and sets it up again
  ******************************************************************************/
-void tsp_generic_timer_handler()
+void tsp_generic_timer_handler(void)
 {
 	/* Ensure that the timer did assert the interrupt */
 	assert(get_cntp_ctl_istatus(read_cntps_ctl_el1()));
@@ -76,7 +76,7 @@
 /*******************************************************************************
  * This function deasserts the timer interrupt prior to cpu power down
  ******************************************************************************/
-void tsp_generic_timer_stop()
+void tsp_generic_timer_stop(void)
 {
 	/* Disable the timer */
 	write_cntps_ctl_el1(0);
@@ -85,7 +85,7 @@
 /*******************************************************************************
  * This function saves the timer context prior to cpu suspension
  ******************************************************************************/
-void tsp_generic_timer_save()
+void tsp_generic_timer_save(void)
 {
 	uint32_t linear_id = platform_get_core_pos(read_mpidr());
 
@@ -98,7 +98,7 @@
 /*******************************************************************************
  * This function restores the timer context post cpu resummption
  ******************************************************************************/
-void tsp_generic_timer_restore()
+void tsp_generic_timer_restore(void)
 {
 	uint32_t linear_id = platform_get_core_pos(read_mpidr());