diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index 050ef52..e3068b6 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -262,7 +262,7 @@
 
 /*******************************************************************************
  * Perform the very early platform specific architectural setup here. At the
- * moment this only intializes the mmu in a quick and dirty way.
+ * moment this only initializes the mmu in a quick and dirty way.
  ******************************************************************************/
 void bl31_plat_arch_setup(void)
 {
diff --git a/plat/nvidia/tegra/drivers/memctrl/memctrl_v2.c b/plat/nvidia/tegra/drivers/memctrl/memctrl_v2.c
index 92120b5..0644fd2 100644
--- a/plat/nvidia/tegra/drivers/memctrl/memctrl_v2.c
+++ b/plat/nvidia/tegra/drivers/memctrl/memctrl_v2.c
@@ -301,7 +301,7 @@
 	if (video_mem_base != 0U) {
 		/*
 		 * Lock the non overlapping memory being cleared so that
-		 * other masters do not accidently write to it. The memory
+		 * other masters do not accidentally write to it. The memory
 		 * would be unlocked once the non overlapping region is
 		 * cleared and the new memory settings take effect.
 		 */
diff --git a/plat/nvidia/tegra/include/drivers/tegra_gic.h b/plat/nvidia/tegra/include/drivers/tegra_gic.h
index 6661dff..9f9477c 100644
--- a/plat/nvidia/tegra/include/drivers/tegra_gic.h
+++ b/plat/nvidia/tegra/include/drivers/tegra_gic.h
@@ -19,7 +19,7 @@
 } pcpu_fiq_state_t;
 
 /*******************************************************************************
- * Fucntion declarations
+ * Function declarations
  ******************************************************************************/
 void tegra_gic_cpuif_deactivate(void);
 void tegra_gic_init(void);
diff --git a/plat/nvidia/tegra/include/t186/tegra_def.h b/plat/nvidia/tegra/include/t186/tegra_def.h
index a971cec..cf8778b 100644
--- a/plat/nvidia/tegra/include/t186/tegra_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_def.h
@@ -84,7 +84,7 @@
 #define TEGRA_CLK_SE			TEGRA186_CLK_SE
 
 /*******************************************************************************
- * Tegra Miscellanous register constants
+ * Tegra Miscellaneous register constants
  ******************************************************************************/
 #define TEGRA_MISC_BASE			U(0x00100000)
 #define  HARDWARE_REVISION_OFFSET	U(0x4)
diff --git a/plat/nvidia/tegra/include/t194/tegra_def.h b/plat/nvidia/tegra/include/t194/tegra_def.h
index abe193f..2158913 100644
--- a/plat/nvidia/tegra/include/t194/tegra_def.h
+++ b/plat/nvidia/tegra/include/t194/tegra_def.h
@@ -60,7 +60,7 @@
 #define TEGRA_CLK_SE			TEGRA194_CLK_SE
 
 /*******************************************************************************
- * Tegra Miscellanous register constants
+ * Tegra Miscellaneous register constants
  ******************************************************************************/
 #define TEGRA_MISC_BASE			U(0x00100000)
 
diff --git a/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h b/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
index ecfb3f4..45302da 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
+++ b/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
@@ -40,7 +40,7 @@
 	/* index 83 is deprecated */
 	TEGRA_ARI_PERFMON = 84U,
 	TEGRA_ARI_UPDATE_CCPLEX_GSC = 85U,
-	/* index 86 is depracated */
+	/* index 86 is deprecated */
 	/* index 87 is deprecated */
 	TEGRA_ARI_ROC_FLUSH_CACHE_ONLY = 88U,
 	TEGRA_ARI_ROC_FLUSH_CACHE_TRBITS = 89U,
diff --git a/plat/nvidia/tegra/soc/t194/drivers/include/t194_nvg.h b/plat/nvidia/tegra/soc/t194/drivers/include/t194_nvg.h
index 7a68a43..ca74d2c 100644
--- a/plat/nvidia/tegra/soc/t194/drivers/include/t194_nvg.h
+++ b/plat/nvidia/tegra/soc/t194/drivers/include/t194_nvg.h
@@ -17,7 +17,7 @@
 
 /**
  * Current version - Major version increments may break backwards
- * compatiblity and binary compatibility. Minor version increments
+ * compatibility and binary compatibility. Minor version increments
  * occur when there is only new functionality.
  */
 enum {
diff --git a/plat/nvidia/tegra/soc/t194/plat_ras.c b/plat/nvidia/tegra/soc/t194/plat_ras.c
index a9fed0a..6d7e900 100644
--- a/plat/nvidia/tegra/soc/t194/plat_ras.c
+++ b/plat/nvidia/tegra/soc/t194/plat_ras.c
@@ -284,7 +284,7 @@
 	ERROR("RAS Error in %s, ERRSELR_EL1=0x%x:\n", name, errselr);
 	ERROR("\tStatus = 0x%" PRIx64 "\n", status);
 
-	/* Print uncorrectable errror information. */
+	/* Print uncorrectable error information. */
 	if (ERR_STATUS_GET_FIELD(status, UE) != 0U) {
 
 		ERR_STATUS_SET_FIELD(val, UE, 1);