| commit | 2be03c06e08df475673ace8137ea2a630f52d7a3 | [log] [tgz] |
|---|---|---|
| author | Elyes Haouas <ehaouas@noos.fr> | Mon Feb 13 09:14:48 2023 +0100 |
| committer | Manish Pandey <manish.pandey2@arm.com> | Tue May 09 15:57:12 2023 +0100 |
| tree | 5085dd0af7deed3a5a52dbcd82a78aa5cd96e888 | |
| parent | 64b7cdcb4c2689a0907c7a063ca2d1369399290d [diff] |
fix(tree): correct some typos found using codespell (https://github.com/codespell-project/codespell). Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
diff --git a/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h b/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h index 8410024..f6d41d7 100644 --- a/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h +++ b/include/drivers/arm/cryptocell/712/cc_pal_types_plat.h
@@ -9,7 +9,7 @@ */ #ifndef _CC_PAL_TYPES_PLAT_H #define _CC_PAL_TYPES_PLAT_H -/* Host specific types for standard (ISO-C99) compilant platforms */ +/* Host specific types for standard (ISO-C99) compliant platforms */ #include <stddef.h> #include <stdint.h>
diff --git a/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h b/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h index 9848472..0c102a0 100644 --- a/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h +++ b/include/drivers/arm/cryptocell/713/cc_pal_types_plat.h
@@ -9,7 +9,7 @@ */ #ifndef _CC_PAL_TYPES_PLAT_H #define _CC_PAL_TYPES_PLAT_H -/* Host specific types for standard (ISO-C99) compilant platforms */ +/* Host specific types for standard (ISO-C99) compliant platforms */ #include <stddef.h> #include <stdint.h>
diff --git a/include/drivers/arm/gic600ae_fmu.h b/include/drivers/arm/gic600ae_fmu.h index 88b87b9..d2a92dd 100644 --- a/include/drivers/arm/gic600ae_fmu.h +++ b/include/drivers/arm/gic600ae_fmu.h
@@ -85,7 +85,7 @@ #define FMU_BLK_PPI31 U(43) #define FMU_BLK_PRESENT_MASK U(0xFFFFFFFFFFF) -/* Safety Mechamism limit */ +/* Safety Mechanism limit */ #define FMU_SMID_GICD_MAX U(33) #define FMU_SMID_PPI_MAX U(12) #define FMU_SMID_ITS_MAX U(14)