diff --git a/drivers/renesas/common/console/rcar_printf.c b/drivers/renesas/common/console/rcar_printf.c
index ad074fe..6af10ee 100644
--- a/drivers/renesas/common/console/rcar_printf.c
+++ b/drivers/renesas/common/console/rcar_printf.c
@@ -24,7 +24,7 @@
 /*
  * The log is initialized and used before BL31 xlat tables are initialized,
  * therefore the log memory is a device memory at that point. Make sure the
- * memory is correclty aligned and accessed only with up-to 32bit, aligned,
+ * memory is correctly aligned and accessed only with up-to 32bit, aligned,
  * writes.
  */
 CASSERT((RCAR_BL31_LOG_BASE & 0x7) == 0, assert_bl31_log_base_unaligned);
diff --git a/drivers/renesas/common/emmc/emmc_hal.h b/drivers/renesas/common/emmc/emmc_hal.h
index 0a85517..4e6942f 100644
--- a/drivers/renesas/common/emmc/emmc_hal.h
+++ b/drivers/renesas/common/emmc/emmc_hal.h
@@ -512,7 +512,7 @@
 	/* maximum block count which can be transferred at once */
 	uint32_t max_block_count;
 
-	/* maximum clock frequence in Hz supported by HW */
+	/* maximum clock frequency in Hz supported by HW */
 	uint32_t max_clock_freq;
 
 	/* maximum data bus width supported by HW */
diff --git a/drivers/renesas/common/pfc_regs.h b/drivers/renesas/common/pfc_regs.h
index 4187733..36084f5 100644
--- a/drivers/renesas/common/pfc_regs.h
+++ b/drivers/renesas/common/pfc_regs.h
@@ -146,10 +146,10 @@
 #define GPIO_OUTDTL7		(GPIO_BASE + 0x5848U)
 #define GPIO_BOTHEDGE7		(GPIO_BASE + 0x584CU)
 
-/* Pin functon base address */
+/* Pin function base address */
 #define PFC_BASE		(0xE6060000U)
 
-/* Pin functon registers */
+/* Pin function registers */
 #define PFC_PMMR		(PFC_BASE + 0x0000U)
 #define PFC_GPSR0		(PFC_BASE + 0x0100U)
 #define PFC_GPSR1		(PFC_BASE + 0x0104U)
diff --git a/drivers/renesas/rcar/pfc/V3M/pfc_init_v3m.c b/drivers/renesas/rcar/pfc/V3M/pfc_init_v3m.c
index 6063758..5de4f1f 100644
--- a/drivers/renesas/rcar/pfc/V3M/pfc_init_v3m.c
+++ b/drivers/renesas/rcar/pfc/V3M/pfc_init_v3m.c
@@ -12,7 +12,7 @@
 #include "rcar_private.h"
 #include "../pfc_regs.h"
 
-/* Pin functon bit */
+/* Pin function bit */
 #define GPSR0_DU_EXODDF_DU_ODDF_DISP_CDE	BIT(21)
 #define GPSR0_DU_EXVSYNC_DU_VSYNC		BIT(20)
 #define GPSR0_DU_EXHSYNC_DU_HSYNC		BIT(19)