commit 2a9e1ac7e0753e42281c8729ef3a2ad27d03ce91
author Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Mon Mar 11 15:15:25 2019 +0900
committer Marek Vasut <marek.vasut+renesas@gmail.com> Thu Apr 11 12:57:00 2019 +0200
tree cfba2fcbe1e511ec33d69d80873bbd67533e8921
parent 908b1ca61ae6c243c86b4dd43e36a44d0fe5f122

rcar_gen3: drivers: qos: change subslot cycle

Subslot cycle from 132 to 126 as default setting.
Subslot cycle from 264 to 252.

 [IPL/QoS]
 - Update H3 Ver.2.0 QoS setting rev.0.21.
 - Update H3 Ver.3.0 QoS setting rev.0.11.
 - Update M3 Ver.1.1 QoS setting rev.0.19.
 - Update M3 Ver.3.0 QoS setting rev.0.02.
 - Update M3N Ver.1.1 QoS setting rev.0.09.

Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I52b1bf880163ce03065dc8933d7f193e45cfd9a5

drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 95f4810..ffc9025 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -13,7 +13,7 @@
 #include "qos_init_h3_v30.h"
 
 
-#define	RCAR_QOS_VERSION		"rev.0.10"
+#define	RCAR_QOS_VERSION		"rev.0.11"
 
 #define QOSCTRL_FSS			(QOS_BASE1 + 0x0048U)