refactor(plat/rockchip/rk3399/drivers/gpio): reduce code duplication
Refactor the GPIO code to use a small lookup table instead of redundant or
repetitive code.
Signed-off-by: Jona Stubbe <tf-a@jona-stubbe.de>
Change-Id: Icf60385095efc1f506e4215d497b60f90e16edfd
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
diff --git a/plat/rockchip/rk3399/drivers/soc/soc.h b/plat/rockchip/rk3399/drivers/soc/soc.h
index 8539337..8daa5bb 100644
--- a/plat/rockchip/rk3399/drivers/soc/soc.h
+++ b/plat/rockchip/rk3399/drivers/soc/soc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -145,6 +145,8 @@
* pmugrf reg, offset
**************************************************/
#define PMUGRF_OSREG(n) (0x300 + (n) * 4)
+#define PMUGRF_GPIO0A_P 0x040
+#define PMUGRF_GPIO1A_P 0x050
/**************************************************
* DCF reg, offset
@@ -248,6 +250,9 @@
#define GRF_USBPHY1_CTRL16 0x4540
#define GRF_GPIO2A_IOMUX 0xe000
+#define GRF_GPIO2A_P 0xe040
+#define GRF_GPIO3A_P 0xe050
+#define GRF_GPIO4A_P 0xe060
#define GRF_GPIO2D_HE 0xe18c
#define GRF_DDRC0_CON0 0xe380
#define GRF_DDRC0_CON1 0xe384