Merge changes I25047322,Id476f815 into integration
* changes:
fix(plat/rcar3): change stack size of BL31
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
diff --git a/.commitlintrc.js b/.commitlintrc.js
index f970481..ed971a3 100644
--- a/.commitlintrc.js
+++ b/.commitlintrc.js
@@ -8,26 +8,44 @@
"use strict";
-const cz = require("./.cz.json");
+const fs = require("fs");
+const yaml = require("js-yaml");
+
const { "trailer-exists": trailerExists } = require("@commitlint/rules").default;
/*
- * Recursively fetch the project's supported scopes from the Commitizen configuration file. We use
- * permit only the blessed scope for each section to encourage developers to use a consistent scope
- * scheme.
+ * The types and scopes accepted by both Commitlint and Commitizen are defined by the changelog
+ * configuration file - `changelog.yaml` - as they decide which section of the changelog commits
+ * with a given type and scope are placed in.
*/
-function getScopes(sections) {
- return sections.flatMap(section => {
- const scopes = section.scopes;
- const subscopes = getScopes(section.sections || []);
+
+let changelog;
- const scope = scopes ? [ scopes[0] ] : []; /* Only use the blessed scope */
+try {
+ const contents = fs.readFileSync("changelog.yaml", "utf8");
+
+ changelog = yaml.load(contents);
+} catch (err) {
+ console.log(err);
+
+ throw err;
+}
+
+function getTypes(sections) {
+ return sections.map(section => section.type)
+}
+
+function getScopes(subsections) {
+ return subsections.flatMap(subsection => {
+ const scope = subsection.scope ? [ subsection.scope ] : [];
+ const subscopes = getScopes(subsection.subsections || []);
return scope.concat(subscopes);
})
};
-const scopes = getScopes(cz.sections); /* Contains every blessed scope */
+const types = getTypes(changelog.sections).sort(); /* Sort alphabetically */
+const scopes = getScopes(changelog.subsections).sort(); /* Sort alphabetically */
module.exports = {
extends: ["@commitlint/config-conventional"],
@@ -40,13 +58,17 @@
},
],
rules: {
- "body-max-line-length": [1, "always", cz.maxLineWidth], /* Warning */
- "header-max-length": [1, "always", cz.maxHeaderWidth], /* Warning */
+ "header-max-length": [1, "always", 50], /* Warning */
+ "body-max-line-length": [1, "always", 72], /* Warning */
"change-id-exists": [1, "always", "Change-Id:"], /* Warning */
"signed-off-by-exists": [1, "always", "Signed-off-by:"], /* Warning */
+ "type-case": [2, "always", "lower-case" ], /* Error */
+ "type-enum": [2, "always", types], /* Error */
+
"scope-case": [2, "always", "lower-case"], /* Error */
+ "scope-empty": [2, "never"], /* Error */
"scope-enum": [1, "always", scopes] /* Warning */
},
};
diff --git a/.cz.json b/.cz.json
index 3c28d3c..556c39f 100644
--- a/.cz.json
+++ b/.cz.json
@@ -1,838 +1,3 @@
{
- "path": "./node_modules/cz-conventional-changelog",
- "maxHeaderWidth": 50,
- "maxLineWidth": 72,
- "types": [
- {
- "type": "feat",
- "title": "New Features",
- "description": "A new feature"
- },
- {
- "type": "fix",
- "title": "Resolved Issues",
- "description": "A bug fix"
- },
- {
- "type": "build",
- "title": "Build System",
- "description": "Changes that affect the build system or external dependencies",
- "hidden": true
- },
- {
- "type": "ci",
- "title": "Continuous Integration",
- "description": "Changes to our CI configuration files and scripts",
- "hidden": true
- },
- {
- "type": "docs",
- "title": "Build System",
- "description": "Documentation-only changes",
- "hidden": true
- },
- {
- "type": "perf",
- "title": "Performance Improvements",
- "description": "A code change that improves performance",
- "hidden": true
- },
- {
- "type": "refactor",
- "title": "Code Refactoring",
- "description": "A code change that neither fixes a bug nor adds a feature",
- "hidden": true
- },
- {
- "type": "revert",
- "title": "Reverted Changes",
- "description": "Changes that revert a previous change",
- "hidden": true
- },
- {
- "type": "style",
- "title": "Style",
- "description": "Changes that do not affect the meaning of the code (white-space, formatting, missing semi-colons, etc.)",
- "hidden": true
- },
- {
- "type": "test",
- "title": "Tests",
- "description": "Adding missing tests or correcting existing tests",
- "hidden": true
- },
- {
- "type": "chore",
- "title": "Miscellaneous",
- "description": "Any other change",
- "hidden": true
- }
- ],
- "sections": [
- {
- "title": "Architecture",
- "sections": [
- {
- "title": "Activity Monitors Extension (FEAT_AMU)",
- "scopes": ["amu"]
- },
- {
- "title": "Support for the `HCRX_EL2` register (FEAT_HCX)",
- "scopes": ["hcx"]
- },
- {
- "title": "Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)",
- "scopes": ["mpam"]
- },
- {
- "title": "Scalable Matrix Extension (FEAT_SME)",
- "scopes": ["sme"]
- },
- {
- "title": "Scalable Vector Extension (FEAT_SVE)",
- "scopes": ["sve"]
- },
- {
- "title": "System Register Trace Extensions (FEAT_ETMv4, FEAT_ETE and FEAT_ETEv1.1)",
- "scopes": ["sys-reg-trace", "sys_reg_trace"]
- },
- {
- "title": "Trace Buffer Extension (FEAT_TRBE)",
- "scopes": ["trbe"]
- },
- {
- "title": "Self-hosted Trace Extension (FEAT_TRF)",
- "scopes": ["trf"]
- }
- ]
- },
- {
- "title": "Platforms",
- "sections": [
- {
- "title": "Allwinner",
- "scopes": ["allwinner", "plat/allwinner"]
- },
- {
- "title": "Arm",
- "scopes": ["arm", "plat/arm"],
- "sections": [
- {
- "title": "FPGA",
- "scopes": ["fpga", "arm_fgpa", "arm_fpga", "plat/arm_fpga"]
- },
- {
- "title": "FVP",
- "scopes": ["fvp", "plat/fvp"]
- },
- {
- "title": "FVP-R",
- "scopes": ["fvp-r", "fvp_r"]
- },
- {
- "title": "Juno",
- "scopes": ["juno"]
- },
- {
- "title": "Morello",
- "scopes": ["morello"]
- },
- {
- "title": "RD",
- "scopes": ["rd"],
- "sections": [
- {
- "title": "RD-N2",
- "scopes": ["rdn2", "board/rdn2"]
- }
- ]
- },
- {
- "title": "SGI",
- "scopes": ["sgi", "plat/sgi", "plat/arm/sgi" ]
- },
- {
- "title": "TC",
- "scopes": ["tc"],
- "sections": [
- {
- "title": "TC0",
- "scopes": ["tc0", "plat/tc0"]
- }
- ]
- }
- ]
- },
- {
- "title": "Marvell",
- "scopes": ["marvell", "plat/marvell"],
- "sections": [
- {
- "title": "Armada",
- "scopes": ["armada", "plat/marvell/armada"],
- "sections": [
- {
- "title": "A3K",
- "scopes": ["a3k", "plat/marvell/a3k"]
- },
- {
- "title": "A8K",
- "scopes": ["a8k", "plat/marvell/a8k"]
- }
- ]
- }
- ]
- },
- {
- "title": "MediaTek",
- "scopes": ["mediatek", "plat/mediatek/common", "plat/mediatek"],
- "sections": [
- {
- "title": "MT8183",
- "scopes": ["mt8183", "plat/mediatek/mt8183"]
- },
- {
- "title": "MT8192",
- "scopes": ["mt8192", "plat/mdeiatek/mt8192"]
- },
- {
- "title": "MT8195",
- "scopes": ["mt8195", "plat/mediatek/me8195", "plat/mediatek/mt8195", "plat/mdeiatek/mt8195"]
- },
- {
- "title": "MT8186",
- "scopes": ["mt8186", "plat/mediatek/mt8186"]
- }
- ]
- },
- {
- "title": "NVIDIA",
- "scopes": ["nvidia"],
- "sections": [
- {
- "title": "Tegra",
- "scopes": ["tegra", "plat/tegra"],
- "sections": [
- {
- "title": "Tegra 132",
- "scopes": ["tegra132"]
- }
- ]
- }
- ]
- },
- {
- "title": "NXP",
- "scopes": ["nxp", "plat/nxp", "plat/nxp/common"],
- "sections": [
- {
- "title": "i.MX",
- "scopes": ["imx", "plat/imx", "plat/imx/imx"],
- "sections": [
- {
- "title": "i.MX 8M",
- "scopes": ["imx8m", "plat/imx8m", "plat/imx/imx8m"],
- "sections": [
- {
- "title": "i.MX 8M Mini",
- "scopes": ["imx8mm", "plat/imx/imx8m/imx8mm"]
- },
- {
- "title": "i.MX 8M Plus",
- "scopes": ["imx8mp", "plat/imx/imx8m/imx8mp"]
- }
- ]
- }
- ]
- },
- {
- "title": "Layerscape",
- "scopes": ["layerscape", "docs/nxp/layerscape"],
- "sections": [
- {
- "title": "LX2",
- "scopes": ["lx2", "plat/nxp/lx2"],
- "sections": [
- {
- "title": "LX216",
- "scopes": ["lx216", "plat/nxp/lx216x"],
- "sections": [
- {
- "title": "LX2160",
- "scopes": ["lx2160", "plat/soc-lx2160"]
- }
- ]
- },
- {
- "title": "LS1028A",
- "scopes": ["ls1028a", "plat/nxp/ls1028a"],
- "sections": [
- {
- "title": "LS1028ARDB",
- "scopes": ["ls1028ardb", "plat/nxp/ls1028ardb"]
- }
- ]
- }
- ]
- }
- ]
- }
- ]
- },
- {
- "title": "QEMU",
- "scopes": ["qemu", "plat/qemu"]
- },
- {
- "title": "QTI",
- "scopes": ["qti"],
- "sections": [
- {
- "title": "SC1780",
- "scopes": ["sc7180", "plat/qti/sc7180"]
- },
- {
- "title": "SC7280",
- "scopes": ["sc7280", "plat/qti/sc7280"]
- }
- ]
- },
- {
- "title": "Raspberry Pi",
- "scopes": ["rpi"],
- "sections": [
- {
- "title": "Raspberry Pi 4",
- "scopes": ["rpi4"]
- }
- ]
- },
- {
- "title": "Renesas",
- "scopes": ["renesas"],
- "sections": [
- {
- "title": "R-Car",
- "scopes": ["rcar", "plat/rcar"],
- "sections": [
- {
- "title": "R-Car 3",
- "scopes": ["rcar3", "plat/rcar3"]
- }
- ]
- }
- ]
- },
- {
- "title": "Rockchip",
- "scopes": ["rockchip"],
- "sections": [
- {
- "title": "RK3399",
- "scopes": ["rk3399", "rockchip/rk3399", "rk3399/suspend"]
- }
- ]
- },
- {
- "title": "Socionext",
- "scopes": ["socionext"],
- "sections": [
- {
- "title": "Synquacer",
- "scopes": ["synquacer", "plat/synquacer"]
- }
- ]
- },
- {
- "title": "ST",
- "scopes": ["st", "plat/st"],
- "sections": [
- {
- "title": "ST32MP1",
- "scopes": ["stm32mp1", "plat/st/stm32mp1"]
- }
- ]
- },
- {
- "title": "Xilinx",
- "scopes": ["xilinx", "plat/xilinx"],
- "sections": [
- {
- "title": "Versal",
- "scopes": ["versal", "plat/xilinx/versal/include", "plat/xilinx/versal", "plat/versal"]
- },
- {
- "title": "ZynqMP",
- "scopes": ["zynqmp", "plat/zynqmp", "plat/xilinx/zynqmp"]
- }
- ]
- }
- ]
- },
- {
- "title": "Bootloader Images",
- "scopes": ["bl", "bl_common"],
- "sections": [
- {
- "title": "BL1",
- "scopes": ["bl1"]
- },
- {
- "title": "BL2",
- "scopes": ["bl2"]
- }
- ]
- },
- {
- "title": "Services",
- "scopes": ["services"],
- "sections": [
- {
- "title": "FF-A",
- "scopes": ["ffa", "ff-a"]
- },
- {
- "title": "RME",
- "scopes": ["rme"]
- },
- {
- "title": "SPM",
- "scopes": ["spm", "spmc", "spmd", "SPMD", "spm_mm"]
- }
- ]
- },
- {
- "title": "Libraries",
- "sections": [
- {
- "title": "CPU Support",
- "scopes": ["cpus", "cpu", "errata", "errata_report"]
- },
- {
- "title": "EL3 Runtime",
- "scopes": ["el3-runtime", "el3_runtime"]
- },
- {
- "title": "FCONF",
- "scopes": ["fconf"]
- },
- {
- "title": "MPMM",
- "scopes": ["mpmm"]
- },
- {
- "title": "OP-TEE",
- "scopes": ["optee", "lib/optee"]
- },
- {
- "title": "PSCI",
- "scopes": ["psci"]
- },
- {
- "title": "GPT",
- "scopes": ["gpt", "gpt_rme"]
- },
- {
- "title": "SMCCC",
- "scopes": ["smccc"]
- },
- {
- "title": "Translation Tables",
- "scopes": ["xlat"]
- }
- ]
- },
- {
- "title": "Drivers",
- "sections": [
- {
- "title": "Authentication",
- "scopes": ["auth", "driver/auth"],
- "sections": [
- {
- "title": "CryptoCell-713",
- "scopes": ["cc-713"]
- }
- ]
- },
- {
- "title": "FWU",
- "scopes": ["fwu", "fwu_metadata"]
- },
- {
- "title": "I/O",
- "scopes": ["io"],
- "sections": [
- {
- "title": "MTD",
- "scopes": ["mtd", "io_mtd"]
- }
- ]
- },
- {
- "title": "Measured Boot",
- "scopes": ["measured-boot", "measured boot", "measured_boot"]
- },
- {
- "title": "MMC",
- "scopes": ["mmc", "drivers/mmc"]
- },
- {
- "title": "MTD",
- "scopes": ["mtd", "drivers/mtd"],
- "sections": [
- {
- "title": "NAND",
- "scopes": ["nand"],
- "sections": [
- {
- "title": "SPI NAND",
- "scopes": ["spi-nand", "spi_nand"]
- }
- ]
- }
- ]
- },
- {
- "title": "SCMI",
- "scopes": ["scmi", "scmi_common", "drivers/scmi-msg"]
- },
- {
- "title": "UFS",
- "scopes": ["ufs"]
- },
- {
- "title": "Arm",
- "scopes": ["arm-drivers"],
- "sections": [
- {
- "title": "Ethos-N",
- "scopes": ["ethos-n", "drivers/arm/ethosn"]
- },
- {
- "title": "GIC",
- "scopes": ["gic"],
- "sections": [
- {
- "title": "GICv3",
- "scopes": ["gicv3"],
- "sections": [
- {
- "title": "GIC-600AE",
- "scopes": ["gic600ae"]
- }
- ]
- }
- ]
- },
- {
- "title": "TZC",
- "scopes": ["tzc"],
- "sections": [
- {
- "title": "TZC-400",
- "scopes": ["tzc400", "drivers/tzc400"]
- }
- ]
- }
- ]
- },
- {
- "title": "Marvell",
- "scopes": ["marvell-drivers"],
- "sections": [
- {
- "title": "COMPHY",
- "scopes": ["marvell-comphy", "drivers/marvell/comphy"],
- "sections": [
- {
- "title": "Armada 3700",
- "scopes": ["marvell-comphy-3700", "drivers/marvell/comphy-3700"]
- },
- {
- "title": "CP110",
- "scopes": ["marvell-comphy-cp110", "drivers/marvell/comphy-cp110"]
- }
- ]
- },
- {
- "title": "UART",
- "scopes": ["marvell-uart", "plat/marvell/uart"]
- },
- {
- "title": "Armada",
- "scopes": ["armada-drivers"],
- "sections": [
- {
- "title": "A3K",
- "scopes": ["a3k-drivers"],
- "sections": [
- {
- "title": "A3720",
- "scopes": ["a3720-uart", "plat/marvell/a3720/uart"]
- }
- ]
- }
- ]
- }
- ]
- },
- {
- "title": "MediaTek",
- "scopes": ["mediatek-drivers"],
- "sections": [
- {
- "title": "APU",
- "scopes": ["mediatek-apu", "plat/mediatek/apu"]
- },
- {
- "title": "EMI MPU",
- "scopes": ["mediatek-emi-mpu", "plat/mediatek/mpu"]
- },
- {
- "title": "PMIC Wrapper",
- "scopes": ["mediatek-pmic-wrapper", "plat/mediatek/pmic_wrap"]
- },
- {
- "title": "MT8192",
- "scopes": ["mt8192-drivers"],
- "sections": [
- {
- "title": "SPM",
- "scopes": ["mt8192-spm", "mediatek/mt8192/spm"]
- }
- ]
- }
- ]
- },
- {
- "title": "NXP",
- "scopes": ["nxp-drivers"],
- "sections": [
- {
- "title": "DCFG",
- "scopes": ["nxp-dcfg", "driver/nxp/dcfg"]
- },
- {
- "title": "FLEXSPI",
- "scopes": ["flexspi", "include/drivers/flexspi", "driver/nxp/xspi"]
- },
- {
- "title": "SCFG",
- "scopes": ["nxp-scfg", "nxp/scfg"]
- },
- {
- "title": "SFP",
- "scopes": ["nxp-sfp", "drivers/nxp/sfp"]
- }
- ]
- },
- {
- "title": "Renesas",
- "scopes": ["renesas-drivers"],
- "sections": [
- {
- "title": "R-Car3",
- "scopes": ["rcar3-drivers", "drivers/rcar3"]
- }
- ]
- },
- {
- "title": "ST",
- "scopes": ["st-drivers", "drivers/st"],
- "sections": [
- {
- "title": "Clock",
- "scopes": ["st-clock", "stm32mp_clk", "drivers/st/clk", "stm32mp1_clk"]
- },
- {
- "title": "I/O",
- "scopes": ["st-io-drivers"],
- "sections": [
- {
- "title": "STM32 Image",
- "scopes": ["st-io-stm32image", "io-stm32image", "io_stm32image"]
- }
- ]
- },
- {
- "title": "SDMMC2",
- "scopes": ["st-sdmmc2", "stm32_sdmmc2"]
- },
- {
- "title": "ST PMIC",
- "scopes": ["st-pmic", "drivers/st/pmic"]
- },
- {
- "title": "STPMIC1",
- "scopes": ["stpmic1"]
- },
- {
- "title": "UART",
- "scopes": ["st-uart"],
- "sections": [
- {
- "title": "STM32 Console",
- "scopes": ["stm32-console", "stm32_console"]
- }
- ]
- },
- {
- "title": "USB",
- "scopes": ["st-usb", "drivers/st/usb"]
- }
- ]
- },
- {
- "title": "USB",
- "scopes": ["usb", "drivers/usb"]
- }
- ]
- },
- {
- "title": "Miscellaneous",
- "sections": [
- {
- "title": "AArch64",
- "scopes": ["aarch64"]
- },
- {
- "title": "Debug",
- "scopes": ["debug", "common/debug"]
- },
- {
- "title": "CRC32",
- "scopes": ["crc32"],
- "sections": [
- {
- "title": "Hardware CRC32",
- "scopes": ["hw-crc32", "hw_crc", "hw_crc32"]
- },
- {
- "title": "Software CRC32",
- "scopes": ["sw-crc32", "sw_crc32"]
- }
- ]
- },
- {
- "title": "DT Bindings",
- "scopes": ["dt-bindings"]
- },
- {
- "title": "FDT Wrappers",
- "scopes": ["fdt-wrappers"]
- },
- {
- "title": "FDTs",
- "scopes": ["fdts", "fdt"],
- "sections": [
- {
- "title": "Morello",
- "scopes": ["morello-fdts", "fdts/morello"]
- },
- {
- "title": "STM32MP1",
- "scopes": ["stm32mp1-fdts", "fdts stm32mp1"]
- }
- ]
- },
- {
- "title": "PIE",
- "scopes": ["pie"]
- },
- {
- "title": "Security",
- "scopes": ["security"]
- },
- {
- "title": "SDEI",
- "scopes": ["sdei"]
- },
- {
- "title": "TBBR",
- "scopes": ["tbbr"]
- },
- {
- "title": "NXP",
- "sections": [
- {
- "title": "OCRAM",
- "scopes": ["nxp-ocram", "nxp/common/ocram"]
- },
- {
- "title": "PSCI",
- "scopes": ["nxp-psci", "plat/nxp/common/psci"]
- }
- ]
- }
- ]
- },
- {
- "title": "Documentation",
- "scopes": ["docs", "doc"],
- "sections": [
- {
- "title": "Changelog",
- "scopes": ["changelog"]
- },
- {
- "title": "Commit Style",
- "scopes": ["commit-style"]
- },
- {
- "title": "Contribution Guidelines",
- "scopes": ["contributing", "contribution-guidelines", "docs-contributing.rst"]
- },
- {
- "title": "Maintainers",
- "scopes": ["maintainers"]
- },
- {
- "title": "Prerequisites",
- "scopes": ["prerequisites"]
- }
- ]
- },
- {
- "title": "Build System",
- "scopes": ["build", "makefile", "Makefile"],
- "sections": [
- {
- "title": "Git Hooks",
- "scopes": ["hooks"]
- }
- ]
- },
- {
- "title": "Tools",
- "sections": [
- {
- "title": "STM32 Image",
- "scopes": ["stm32image", "tools/stm32image"]
- },
- {
- "title": "fiptool",
- "scopes": ["fiptool"]
- }
- ]
- },
- {
- "title": "Dependencies",
- "scopes": ["deps"],
- "sections": [
- {
- "title": "checkpatch",
- "scopes": ["checkpatch"]
- },
- {
- "title": "libfdt",
- "scopes": ["libfdt"]
- },
- {
- "title": "Node Package Manager (NPM)",
- "scopes": ["npm"]
- }
- ]
- }
- ]
+ "path": "@commitlint/cz-commitlint"
}
diff --git a/.versionrc.js b/.versionrc.js
index 1046b28..f699a07 100644
--- a/.versionrc.js
+++ b/.versionrc.js
@@ -8,40 +8,87 @@
"use strict";
-const cz = require("./.cz.json");
+const fs = require("fs");
+const yaml = require("js-yaml");
/*
- * Convert the Commitizen types array into the format accepted by the Conventional Changelog
- * Conventional Commits plugin (which our own plugin extends).
+ * The types and scopes accepted by both Commitlint and Commitizen are defined by the changelog
+ * configuration file - `changelog.yaml` - as they decide which section of the changelog commits
+ * with a given type and scope are placed in.
*/
-const types = cz.types.map(type => {
- if (!type.hidden) {
- /*
- * Conventional Changelog prevents each section from appearing only if it has no designated
- * title, regardless of the value of the `hidden` flag.
- */
- type.section = type.title;
- }
- delete type.title;
- delete type.description;
+let changelog;
- return type;
-});
+try {
+ const contents = fs.readFileSync("changelog.yaml", "utf8");
+
+ changelog = yaml.load(contents);
+} catch (err) {
+ console.log(err);
+
+ throw err;
+}
+
+/*
+ * The next couple of functions are just used to transform the changelog YAML configuration
+ * structure into one accepted by the Conventional Changelog adapter (conventional-changelog-tf-a).
+ */
+
+function getTypes(sections) {
+ return sections.map(section => {
+ return {
+ "type": section.type,
+ "section": section.hidden ? undefined : section.title,
+ "hidden": section.hidden || false,
+ };
+ })
+}
+
+function getSections(subsections) {
+ return subsections.flatMap(subsection => {
+ const scope = subsection.scope ? [ subsection.scope ] : [];
+
+ return {
+ "title": subsection.title,
+ "sections": getSections(subsection.subsections || []),
+ "scopes": scope.concat(subsection.deprecated || []),
+ };
+ })
+};
+
+const types = getTypes(changelog.sections);
+const sections = getSections(changelog.subsections);
module.exports = {
"header": "# Change Log & Release Notes\n\nThis document contains a summary of the new features, changes, fixes and known\nissues in each release of Trusted Firmware-A.\n",
"preset": {
"name": "tf-a",
"commitUrlFormat": "https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/{{hash}}",
- "compareUrlFormat": "https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/{{previousTag}}..{{currentTag}}",
+ "compareUrlFormat": "https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/{{previousTag}}..refs/tags/{{currentTag}}",
"userUrlFormat": "https://github.com/{{user}}",
"types": types,
- "sections": cz.sections,
+ "sections": sections,
+ },
+ "infile": "docs/change-log.md",
+ "skip": {
+ "commit": true,
+ "tag": true
},
"bumpFiles": [
{
+ "filename": "package.json",
+ "type": "json"
+ },
+ {
+ "filename": "package-lock.json",
+ "type": "json"
+ },
+ {
+ "filename": "tools/conventional-changelog-tf-a/package.json",
+ "type": "json"
+ },
+ {
"filename": "Makefile",
"updater": {
"readVersion": function (contents) {
diff --git a/Makefile b/Makefile
index ed7b076..a238ee4 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -736,6 +736,12 @@
endif
endif
+ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT}),)
+ CRYPTO_SUPPORT := 1
+else
+ CRYPTO_SUPPORT := 0
+endif
+
# SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled.
ifeq ($(SDEI_SUPPORT)-$(SDEI_IN_FCONF),0-1)
$(error "SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled")
@@ -762,15 +768,6 @@
endif
endif
-# Trusted Boot is a prerequisite for Measured Boot. It provides trust that the
-# code taking the measurements and recording them has not been tampered
-# with. This is referred to as the Root of Trust for Measurement.
-ifeq ($(MEASURED_BOOT),1)
- ifneq (${TRUSTED_BOARD_BOOT},1)
- $(error MEASURED_BOOT requires TRUSTED_BOARD_BOOT=1)
- endif
-endif
-
ifeq ($(PSA_FWU_SUPPORT),1)
$(info PSA_FWU_SUPPORT is an experimental feature)
endif
@@ -1022,6 +1019,7 @@
SPM_MM \
SPMD_SPM_AT_SEL2 \
TRUSTED_BOARD_BOOT \
+ CRYPTO_SUPPORT \
USE_COHERENT_MEM \
USE_DEBUGFS \
ARM_IO_IN_DTB \
@@ -1136,6 +1134,7 @@
SPM_MM \
SPMD_SPM_AT_SEL2 \
TRUSTED_BOARD_BOOT \
+ CRYPTO_SUPPORT \
TRNG_SUPPORT \
USE_COHERENT_MEM \
USE_DEBUGFS \
diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c
index 663ec64..7399bc8 100644
--- a/bl1/bl1_main.c
+++ b/bl1/bl1_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -15,6 +15,7 @@
#include <common/bl_common.h>
#include <common/debug.h>
#include <drivers/auth/auth_mod.h>
+#include <drivers/auth/crypto_mod.h>
#include <drivers/console.h>
#include <lib/cpus/errata_report.h>
#include <lib/utils.h>
@@ -121,10 +122,10 @@
/* Perform remaining generic architectural setup from EL3 */
bl1_arch_setup();
-#if TRUSTED_BOARD_BOOT
+ crypto_mod_init();
+
/* Initialize authentication module */
auth_mod_init();
-#endif /* TRUSTED_BOARD_BOOT */
/* Initialize the measured boot */
bl1_plat_mboot_init();
diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c
index 90fe39b..5da8037 100644
--- a/bl2/bl2_main.c
+++ b/bl2/bl2_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,6 +13,7 @@
#include <common/bl_common.h>
#include <common/debug.h>
#include <drivers/auth/auth_mod.h>
+#include <drivers/auth/crypto_mod.h>
#include <drivers/console.h>
#include <drivers/fwu/fwu.h>
#include <lib/extensions/pauth.h>
@@ -89,10 +90,10 @@
fwu_init();
#endif /* PSA_FWU_SUPPORT */
-#if TRUSTED_BOARD_BOOT
+ crypto_mod_init();
+
/* Initialize authentication module */
auth_mod_init();
-#endif /* TRUSTED_BOARD_BOOT */
/* Initialize the Measured Boot backend */
bl2_plat_mboot_init();
diff --git a/changelog.yaml b/changelog.yaml
new file mode 100644
index 0000000..1bb542a
--- /dev/null
+++ b/changelog.yaml
@@ -0,0 +1,964 @@
+#
+# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+#
+# The following block describes the top-level sections of the changelog. Commits are categorized
+# into these top-level sections based on the commit message "type":
+#
+# feat(xyz): add the xyz feature
+# ^^^^
+#
+
+sections:
+ - title: New Features
+ description: A new feature
+ type: feat
+
+ - title: Resolved Issues
+ description: A bug fix
+ type: fix
+
+ - title: Build System
+ description: Changes that affect the build system or external dependencies
+ type: build
+ hidden: true
+
+ - title: Continuous Integration
+ description: Changes to our CI configuration files and scripts
+ type: ci
+ hidden: true
+
+ - title: Build System
+ description: Documentation-only changes
+ type: docs
+ hidden: true
+
+ - title: Performance Improvements
+ description: A code change that improves performance
+ type: perf
+ hidden: true
+
+ - title: Code Refactoring
+ description: A code change that neither fixes a bug nor adds a feature
+ type: refactor
+ hidden: true
+
+ - title: Reverted Changes
+ description: Changes that revert a previous change
+ type: revert
+ hidden: true
+
+ - title: Style
+ description: Changes that do not affect the meaning of the code (white-space, formatting, missing semi-colons, etc.)
+ type: style
+ hidden: true
+
+ - title: Tests
+ description: Adding missing tests or correcting existing tests
+ type: test
+ hidden: true
+
+ - title: Miscellaneous
+ description: Any other change
+ type: chore
+ hidden: true
+
+#
+# The following block describes the sub-sections of the changelog. These sub-sections may appear in
+# any of the top-level sections, and describe the individual components that a change may relate to.
+#
+# Sub-sections have an optional associated commit message "scope":
+#
+# feat(xyz): add the xyz feature
+# ^^^
+#
+# This file also describes deprecated scopes, which are scopes that were used before we introduced
+# scope enforcement. These will not pass CI checks when used, but they will be used to generate the
+# changelog.
+#
+# Please note that new scopes should be kebab-case: https://en.wiktionary.org/wiki/kebab_case
+#
+
+subsections:
+ - title: Architecture
+
+ subsections:
+ - title: Activity Monitors Extension (FEAT_AMU)
+ scope: amu
+
+ - title: Support for the `HCRX_EL2` register (FEAT_HCX)
+ scope: hcx
+
+ - title: Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)
+ scope: mpam
+
+ - title: Scalable Matrix Extension (FEAT_SME)
+ scope: sme
+
+ - title: Scalable Vector Extension (FEAT_SVE)
+ scope: sve
+
+ - title: System Register Trace Extensions (FEAT_ETMv4, FEAT_ETE and FEAT_ETEv1.1)
+ scope: sys-reg-trace
+
+ deprecated:
+ - sys_reg_trace
+
+ - title: Trace Buffer Extension (FEAT_TRBE)
+ scope: trbe
+
+ - title: Self-hosted Trace Extensions (FEAT_TRF)
+ scope: trf
+
+ - title: Platforms
+
+ subsections:
+ - title: Allwinner
+ scope: allwinner
+
+ deprecated:
+ - plat/allwinner
+
+ - title: Arm
+ scope: arm
+
+ deprecated:
+ - plat/arm
+
+ subsections:
+ - title: FPGA
+ scope: fpga
+
+ deprecated:
+ - arm_fgpa
+ - arm_fpga
+ - plat/arm_fpga
+
+ - title: FVP
+ scope: fvp
+
+ deprecated:
+ - plat/fvp
+
+ - title: FVP-R
+ scope: fvp-r
+
+ deprecated:
+ - fvp_r
+
+ - title: Juno
+ scope: juno
+
+ - title: Morello
+ scope: morello
+
+ - title: RD
+ scope: rd
+
+ subsections:
+ - title: RD-N2
+ scope: rdn2
+
+ deprecated:
+ - board/rdn2
+
+ - title: SGI
+ scope: sgi
+
+ deprecated:
+ - plat/sgi
+ - plat/arm/sgi
+
+ - title: TC
+ scope: tc
+
+ subsections:
+ - title: TC0
+ scope: tc0
+
+ deprecated:
+ - plat/tc0
+
+ - title: Marvell
+ scope: marvell
+
+ deprecated:
+ - plat/marvell
+
+ subsections:
+ - title: Armada
+ scope: armada
+
+ deprecated:
+ - plat/marvell/armada
+
+ subsections:
+ - title: A3K
+ scope: a3k
+
+ deprecated:
+ - plat/marvell/a3k
+
+ - title: A8K
+ scope: a8k
+
+ deprecated:
+ - plat/marvell/a8k
+
+ - title: MediaTek
+ scope: mediatek
+
+ deprecated:
+ - plat/mediatek/common
+ - plat/mediatek
+
+ subsections:
+ - title: MT8183
+ scope: mt8183
+
+ deprecated:
+ - plat/mediatek/mt8183
+
+ - title: MT8192
+ scope: mt8192
+
+ deprecated:
+ - plat/mdeiatek/mt8192
+
+ - title: MT8195
+ scope: mt8195
+
+ deprecated:
+ - plat/mediatek/me8195
+ - plat/mediatek/mt8195
+ - plat/mdeiatek/mt8195
+
+ - title: NVIDIA
+ scope: nvidia
+
+ subsections:
+ - title: Tegra
+ scope: tegra
+
+ deprecated:
+ - plat/tegra
+
+ subsections:
+ - title: Tegra 132
+ scope: tegra132
+
+ - title: NXP
+ scope: nxp
+
+ deprecated:
+ - plat/nxp
+ - plat/nxp/common
+
+ subsections:
+ - title: i.MX
+ scope: imx
+
+ deprecated:
+ - plat/imx
+ - plat/imx/imx
+
+ subsections:
+ - title: i.MX 8M
+ scope: imx8m
+
+ deprecated:
+ - plat/imx8m
+ - plat/imx/imx8m
+
+ subsections:
+ - title: i.MX 8M Mini
+ scope: imx8mm
+
+ deprecated:
+ - plat/imx/imx8m/imx8mm
+
+ - title: i.MX 8M Plus
+ scope: imx8mp
+
+ deprecated:
+ - plat/imx/imx8m/imx8mp
+
+ - title: Layerscape
+ scope: layerscape
+
+ deprecated:
+ - docs/nxp/layerscape
+
+ subsections:
+ - title: LS1028A
+ scope: ls1028a
+
+ deprecated:
+ - plat/nxp/ls1028a
+
+ subsections:
+ - title: LS1028ARDB
+ scope: ls1028ardb
+
+ deprecated:
+ - plat/nxp/ls1028ardb
+
+ - title: LX2
+ scope: lx2
+
+ deprecated:
+ - plat/nxp/lx2
+
+ subsections:
+ - title: LX216
+ scope: lx216
+
+ deprecated:
+ - plat/nxp/lx216x
+
+ subsections:
+ - title: LX2160
+ scope: lx2160
+
+ deprecated:
+ - plat/soc-lx2160
+
+ - title: QEMU
+ scope: qemu
+
+ deprecated:
+ - plat/qemu
+
+ - title: QTI
+ scope: qti
+
+ subsections:
+ - title: SC1780
+ scope: sc7180
+
+ deprecated:
+ - plat/qti/sc7180
+
+ - title: SC7280
+ scope: sc7280
+
+ deprecated:
+ - plat/qti/sc7280
+
+ - title: Raspberry Pi
+ scope: rpi
+
+ subsections:
+ - title: Raspberry Pi 4
+ scope: rpi4
+
+ - title: Renesas
+ scope: renesas
+
+ subsections:
+ - title: R-Car
+ scope: rcar
+
+ deprecated:
+ - plat/rcar
+
+ subsections:
+ - title: R-Car 3
+ scope: rcar3
+
+ deprecated:
+ - plat/rcar3
+
+ - title: Rockchip
+ scope: rockchip
+
+ subsections:
+ - title: RK3399
+ scope: rk3399
+
+ deprecated:
+ - rockchip/rk3399
+ - rk3399/suspend
+
+ - title: Socionext
+ scope: socionext
+
+ subsections:
+ - title: Synquacer
+ scope: synquacer
+
+ deprecated:
+ - plat/synquacer
+
+ - title: ST
+ scope: st
+
+ deprecated:
+ - plat/st
+
+ subsections:
+ - title: ST32MP1
+ scope: stm32mp1
+
+ deprecated:
+ - plat/st/stm32mp1
+
+ - title: Xilinx
+ scope: xilinx
+
+ deprecated:
+ - plat/xilinx
+
+ subsections:
+ - title: Versal
+ scope: versal
+
+ deprecated:
+ - plat/xilinx/versal/include
+ - plat/xilinx/versal
+ - plat/versal
+
+ - title: ZynqMP
+ scope: zynqmp
+
+ deprecated:
+ - plat/zynqmp
+ - plat/xilinx/zynqmp
+
+ - title: Bootloader Images
+ scope: bl
+
+ deprecated:
+ - bl_common
+
+ subsections:
+ - title: BL1
+ scope: bl1
+
+ - title: BL2
+ scope: bl2
+
+ - title: Services
+ scope: services
+
+ subsections:
+ - title: FF-A
+ scope: ffa
+
+ deprecated:
+ - ff-a
+
+ - title: RME
+ scope: rme
+
+ - title: SPM
+ scope: spm
+
+ deprecated:
+ - spmc
+ - spmd
+ - SPMD
+ - spm_mm
+
+ - title: Libraries
+
+ subsections:
+ - title: CPU Support
+ scope: cpus
+
+ deprecated:
+ - cpu
+ - errata
+ - errata_report
+
+ - title: EL3 Runtime
+ scope: el3-runtime
+
+ deprecated:
+ - el3_runtime
+
+ - title: FCONF
+ scope: fconf
+
+ - title: MPMM
+ scope: mpmm
+
+ - title: OP-TEE
+ scope: optee
+
+ deprecated:
+ - lib/optee
+
+ - title: PSCI
+ scope: psci
+
+ - title: GPT
+ scope: gpt
+
+ deprecated:
+ - gpt_rme
+
+ - title: SMCCC
+ scope: smccc
+
+ - title: Translation Tables
+ scope: xlat
+
+ - title: Drivers
+
+ subsections:
+ - title: Authentication
+ scope: auth
+
+ deprecated:
+ - driver/auth
+
+ subsections:
+ - title: CryptoCell-713
+ scope: cc-713
+
+ - title: FWU
+ scope: fwu
+
+ deprecated:
+ - fwu_metadata
+
+ - title: I/O
+ scope: io
+
+ subsections:
+ - title: MTD
+ scope: mtd
+
+ deprecated:
+ - io_mtd
+
+ - title: Measured Boot
+ scope: measured-boot
+
+ deprecated:
+ - measured boot
+ - measured_boot
+
+ - title: MMC
+ scope: mmc
+
+ deprecated:
+ - drivers/mmc
+
+ - title: MTD
+ scope: mtd
+
+ deprecated:
+ - drivers/mtd
+
+ subsections:
+ - title: NAND
+ scope: nand
+
+ subsections:
+ - title: SPI NAND
+ scope: spi-nand
+
+ deprecated:
+ - spi_nand
+
+ - title: Partition
+ scope: partition
+
+ - title: SCMI
+ scope: scmi
+
+ deprecated:
+ - scmi_common
+ - drivers/scmi-msg
+
+ - title: UFS
+ scope: ufs
+
+ - title: Arm
+ scope: arm-drivers
+
+ subsections:
+ - title: Ethos-N
+ scope: ethos-n
+
+ deprecated:
+ - drivers/arm/ethosn
+
+ - title: GIC
+ scope: gic
+
+ subsections:
+ - title: GICv3
+ scope: gicv3
+
+ subsections:
+ - title: GIC-600AE
+ scope: gic600ae
+
+ - title: TZC
+ scope: tzc
+
+ subsections:
+ - title: TZC-400
+ scope: tzc400
+
+ deprecated:
+ - drivers/tzc400
+
+ - title: Marvell
+ scope: marvell-drivers
+
+ subsections:
+ - title: COMPHY
+ scope: marvell-comphy
+
+ deprecated:
+ - drivers/marvell/comphy
+
+ subsections:
+ - title: Armada 3700
+ scope: marvell-comphy-3700
+
+ deprecated:
+ - drivers/marvell/comphy-3700
+
+ - title: CP110
+ scope: marvell-comphy-cp110
+
+ deprecated:
+ - drivers/marvell/comphy-cp110
+
+ - title: UART
+ scope: marvell-uart
+
+ deprecated:
+ - plat/marvell/uart
+
+ - title: Armada
+ scope: armada-drivers
+
+ subsections:
+ - title: A3K
+ scope: a3k-drivers
+
+ subsections:
+ - title: A3720
+ scope: a3720-uart
+
+ deprecated:
+ - plat/marvell/a3720/uart
+
+ - title: MediaTek
+ scope: mediatek-drivers
+
+ subsections:
+ - title: APU
+ scope: mediatek-apu
+
+ deprecated:
+ - plat/mediatek/apu
+
+ - title: EMI MPU
+ scope: mediatek-emi-mpu
+
+ deprecated:
+ - plat/mediatek/mpu
+
+ - title: PMIC Wrapper
+ scope: mediatek-pmic-wrapper
+
+ deprecated:
+ - plat/mediatek/pmic_wrap
+
+ - title: MT8192
+ scope: mt8192-drivers
+
+ subsections:
+ - title: SPM
+ scope: mt8192-spm
+
+ deprecated:
+ - mediatek/mt8192/spm
+
+ - title: NXP
+ scope: nxp-drivers
+
+ subsections:
+ - title: DCFG
+ scope: nxp-dcfg
+
+ deprecated:
+ - driver/nxp/dcfg
+
+ - title: FLEXSPI
+ scope: flexspi
+
+ deprecated:
+ - include/drivers/flexspi
+ - driver/nxp/xspi
+
+ - title: SCFG
+ scope: nxp-scfg
+
+ deprecated:
+ - nxp/scfg
+
+ - title: SFP
+ scope: nxp-sfp
+
+ deprecated:
+ - drivers/nxp/sfp
+
+ - title: Renesas
+ scope: renesas-drivers
+
+ subsections:
+ - title: R-Car3
+ scope: rcar3-drivers
+
+ deprecated:
+ - drivers/rcar3
+
+ - title: ST
+ scope: st-drivers
+
+ deprecated:
+ - drivers/st
+
+ subsections:
+ - title: BSEC
+ scope: st-bsec
+
+ - title: Clock
+ scope: st-clock
+
+ deprecated:
+ - stm32mp_clk
+ - drivers/st/clk
+ - stm32mp1_clk
+
+ - title: Crypto
+ scope: st-crypto
+
+ - title: DDR
+ scope: st-ddr
+
+ - title: I/O
+ scope: st-io-drivers
+
+ subsections:
+ - title: STM32 Image
+ scope: st-io-stm32image
+
+ deprecated:
+ - io-stm32image
+ - io_stm32image
+
+ - title: fiptool
+ scope: fiptool
+
+ - title: I2C
+ scope: st-i2c
+
+ - title: FMC
+ scope: st-fmc
+
+ - title: GPIO
+ scope: st-gpio
+
+ - title: SDMMC2
+ scope: st-sdmmc2
+
+ deprecated:
+ - stm32_sdmmc2
+
+ - title: ST PMIC
+ scope: st-pmic
+
+ deprecated:
+ - drivers/st/pmic
+
+ - title: STPMIC1
+ scope: stpmic1
+
+ - title: Regulator
+ scope: st-regulator
+
+ - title: Reset
+ scope: st-reset
+
+ - title: SPI
+ scope: st-spi
+
+ - title: UART
+ scope: st-uart
+
+ subsections:
+ - title: STM32 Console
+ scope: stm32-console
+
+ deprecated:
+ - stm32_console
+
+ - title: USB
+ scope: st-usb
+
+ deprecated:
+ - drivers/st/usb
+
+ - title: Watchdog
+ scope: st-iwdg
+
+ - title: USB
+ scope: usb
+
+ deprecated:
+ - drivers/usb
+
+ - title: Miscellaneous
+
+ subsections:
+ - title: AArch64
+ scope: aarch64
+
+ - title: Debug
+ scope: debug
+
+ deprecated:
+ - common/debug
+
+ - title: CRC32
+ scope: crc32
+
+ subsections:
+ - title: Hardware CRC32
+ scope: hw-crc32
+
+ deprecated:
+ - hw_crc
+ - hw_crc32
+
+ - title: Software CRC32
+ scope: sw-crc32
+
+ deprecated:
+ - sw_crc32
+
+ - title: DT Bindings
+ scope: dt-bindings
+
+ - title: FDT Wrappers
+ scope: fdt-wrappers
+
+ - title: FDTs
+ scope: fdts
+
+ deprecated:
+ - fdt
+
+ subsections:
+ - title: Morello
+ scope: morello-fdts
+
+ deprecated:
+ - fdts/morello
+
+ - title: STM32MP1
+ scope: stm32mp1-fdts
+
+ deprecated:
+ - fdts stm32mp1
+
+ - title: PIE
+ scope: pie
+
+ - title: Security
+ scope: security
+
+ - title: SDEI
+ scope: sdei
+
+ - title: TBBR
+ scope: tbbr
+
+ - title: NXP
+
+ subsections:
+ - title: OCRAM
+ scope: nxp-ocram
+
+ deprecated:
+ - nxp/common/ocram
+
+ - title: PSCI
+ scope: nxp-psci
+
+ deprecated:
+ - plat/nxp/common/psci
+
+ - title: Documentation
+ scope: docs
+
+ deprecated:
+ - doc
+
+ subsections:
+ - title: Changelog
+ scope: changelog
+
+ - title: Commit Style
+ scope: commit-style
+
+ - title: Contribution Guidelines
+ scope: contributing
+
+ deprecated:
+ - contribution-guidelines
+ - docs-contributing.rst
+
+ - title: Maintainers
+ scope: maintainers
+
+ - title: Prerequisites
+ scope: prerequisites
+
+ - title: Build System
+ scope: build
+
+ deprecated:
+ - makefile
+ - Makefile
+
+ subsections:
+ - title: Git Hooks
+ scope: hooks
+
+ - title: Tools
+
+ subsections:
+ - title: STM32 Image
+ scope: stm32image
+
+ deprecated:
+ - tools/stm32image
+
+ - title: Dependencies
+ scope: deps
+
+ subsections:
+ - title: checkpatch
+ scope: checkpatch
+
+ - title: commitlint
+ scope: commitlint
+
+ - title: libfdt
+ scope: libfdt
+
+ - title: Node Package Manager (NPM)
+ scope: npm
diff --git a/common/bl_common.c b/common/bl_common.c
index eb2352a..9bfaafd 100644
--- a/common/bl_common.c
+++ b/common/bl_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -143,25 +143,6 @@
return io_result;
}
-/*
- * Load an image and flush it out to main memory so that it can be executed
- * later by any CPU, regardless of cache and MMU state.
- */
-static int load_image_flush(unsigned int image_id,
- image_info_t *image_data)
-{
- int rc;
-
- rc = load_image(image_id, image_data);
- if (rc == 0) {
- flush_dcache_range(image_data->image_base,
- image_data->image_size);
- }
-
- return rc;
-}
-
-
#if TRUSTED_BOARD_BOOT
/*
* This function uses recursion to authenticate the parent images up to the root
@@ -202,30 +183,6 @@
return -EAUTH;
}
- if (is_parent_image == 0) {
- /*
- * Measure the image.
- * We do not measure its parents because these only play a role
- * in authentication, which is orthogonal to measured boot.
- *
- * TODO: Change this code if we change our minds about measuring
- * certificates.
- */
- rc = plat_mboot_measure_image(image_id, image_data);
- if (rc != 0) {
- return rc;
- }
-
- /*
- * Flush the image to main memory so that it can be executed
- * later by any CPU, regardless of cache and MMU state. This
- * is only needed for child images, not for the parents
- * (certificates).
- */
- flush_dcache_range(image_data->image_base,
- image_data->image_size);
- }
-
return 0;
}
#endif /* TRUSTED_BOARD_BOOT */
@@ -239,7 +196,7 @@
}
#endif
- return load_image_flush(image_id, image_data);
+ return load_image(image_id, image_data);
}
/*******************************************************************************
@@ -266,6 +223,25 @@
} while ((err != 0) && (plat_try_next_boot_source() != 0));
#endif /* PSA_FWU_SUPPORT */
+ if (err == 0) {
+ /*
+ * If loading of the image gets passed (along with its
+ * authentication in case of Trusted-Boot flow) then measure
+ * it (if MEASURED_BOOT flag is enabled).
+ */
+ err = plat_mboot_measure_image(image_id, image_data);
+ if (err != 0) {
+ return err;
+ }
+
+ /*
+ * Flush the image to main memory so that it can be executed
+ * later by any CPU, regardless of cache and MMU state.
+ */
+ flush_dcache_range(image_data->image_base,
+ image_data->image_size);
+ }
+
return err;
}
diff --git a/docs/change-log.md b/docs/change-log.md
index 7f36d01..ab50968 100644
--- a/docs/change-log.md
+++ b/docs/change-log.md
@@ -3,7 +3,7 @@
This document contains a summary of the new features, changes, fixes and known
issues in each release of Trusted Firmware-A.
-## 2.6 (2021-11-22)
+## [2.6.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.5..refs/tags/v2.6) (2021-11-22)
### âš BREAKING CHANGES
@@ -983,7 +983,7 @@
- do not check merge commits ([77a0a7f](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/77a0a7f1d96b188849d1d8d8884b3c93857d3f69))
-## 2.5.0 (2021-05-17)
+## [2.5.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.4..refs/tags/v2.5) (2021-05-17)
### New Features
@@ -1547,7 +1547,7 @@
- Optimized the code to avoid unnecessary attempts to create non-requested
certificates
-## 2.4.0 (2020-11-17)
+## [2.4.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.3..refs/tags/v2.4) (2020-11-17)
### New Features
@@ -1972,7 +1972,7 @@
being worked around by disabling the warning for the platform until the
underlying issue is resolved in libfdt
-## 2.3 (2020-04-20)
+## [2.3.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.2..refs/tags/v2.3) (2020-04-20)
### New Features
@@ -2347,7 +2347,7 @@
- mediatek/mt6795: This platform does not build in this release
-## 2.2 (2019-10-22)
+## [2.2.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.1..refs/tags/v2.2) (2019-10-22)
### New Features
@@ -2658,7 +2658,7 @@
- mediatek/mt6795: This platform does not build in this release
-## 2.1 (2019-03-29)
+## [2.1.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.0..refs/tags/v2.1) (2019-03-29)
### New Features
@@ -3060,7 +3060,7 @@
- mediatek/mt6795: This platform does not build in this release
-## 2.0 (2018-10-02)
+## [2.0.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.6..refs/tags/v2.0) (2018-10-02)
### New Features
@@ -3091,7 +3091,7 @@
to be working after the removal of the deprecated interfaces although they do
build.
-## 1.6 (2018-09-21)
+## [1.6.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.5..refs/tags/v1.6) (2018-09-21)
### New Features
@@ -3298,7 +3298,7 @@
build process is skipped when running on a Windows host. Known issue from 1.5
version.
-## 1.5 (2018-03-20)
+## [1.5.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.4..refs/tags/v1.5) (2018-03-20)
### New features
@@ -3555,7 +3555,7 @@
- DTB creation not supported when building on a Windows host. This step in the
build process is skipped when running on a Windows host.
-## 1.4 (2017-07-07)
+## [1.4.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.3..refs/tags/v1.4) (2017-07-07)
### New features
@@ -3822,7 +3822,7 @@
platform, please use GCC compiler version of at least 5.0. See [PR#1002] for
more details.
-## 1.3 (2016-10-13)
+## [1.3.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.2..refs/tags/v1.3) (2016-10-13)
### New features
@@ -4021,7 +4021,7 @@
the TF-A build system interprets as errors.
- TBBR is not currently supported when running TF-A in AArch32 state.
-## 1.2 (2015-12-22)
+## [1.2.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.1..refs/tags/v1.2) (2015-12-22)
### New features
@@ -4158,7 +4158,7 @@
incomplete for PSCI, the TSP(D) and the Juno platform.
- Building TF-A with compiler optimisations disabled (`-O0`) fails.
-## 1.1 (2015-02-04)
+## [1.1.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v1.0..refs/tags/v1.1) (2015-02-04)
### New features
@@ -4297,7 +4297,7 @@
its dispatcher (TSPD) is incomplete. Similarly for the PSCI section.
- The Juno-specific firmware design documentation is incomplete.
-## 1.0 (2014-08-28)
+## [1.0.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v0.4..refs/tags/v1.0) (2014-08-28)
### New features
@@ -4443,7 +4443,7 @@
A similar change can be made to the other Cortex-A57-A53 Base FVP variants.
-## 0.4 (2014-06-03)
+## [0.4.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v0.3..refs/tags/v0.4) (2014-06-03)
### New features
@@ -4552,7 +4552,7 @@
- The firmware design documentation for the Test Secure-EL1 Payload (TSP) and
its dispatcher (TSPD) is incomplete. Similarly for the PSCI section.
-## 0.3 (2014-02-28)
+## [0.3.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v0.2..refs/tags/v0.3) (2014-02-28)
### New features
@@ -4689,7 +4689,7 @@
- The firmware design documentation for the Test Secure-EL1 Payload (TSP) and
its dispatcher (TSPD) is incomplete. Similarly for the PSCI section.
-## 0.2 (2013-10-25)
+## [0.2.0](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/4b825dc642cb6eb9a060e54bf8d69288fbee4904..refs/tags/v0.2) (2013-10-25)
### New features
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index d77875e..a34bb3c 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -529,9 +529,9 @@
the build. The default value is 40 in debug builds and 20 in release builds.
- ``MEASURED_BOOT``: Boolean flag to include support for the Measured Boot
- feature. If this flag is enabled ``TRUSTED_BOARD_BOOT`` must be set as well
- in order to provide trust that the code taking the measurements and recording
- them has not been tampered with.
+ feature. This flag can be enabled with ``TRUSTED_BOARD_BOOT`` in order to
+ provide trust that the code taking the measurements and recording them has
+ not been tampered with.
This option defaults to 0.
diff --git a/docs/getting_started/porting-guide.rst b/docs/getting_started/porting-guide.rst
index 24af13e..7f10ca6 100644
--- a/docs/getting_started/porting-guide.rst
+++ b/docs/getting_started/porting-guide.rst
@@ -889,7 +889,7 @@
::
- Argument : struct fwu_metadata *metadata
+ Argument : const struct fwu_metadata *metadata
Return : void
This function is mandatory when PSA_FWU_SUPPORT is enabled.
@@ -932,6 +932,25 @@
Alongside, returns device handle and image specification from the I/O policy
of the requested FWU metadata image.
+Function : plat_fwu_get_boot_idx() [when PSA_FWU_SUPPORT == 1]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+::
+
+ Argument : void
+ Return : uint32_t
+
+This function is mandatory when PSA_FWU_SUPPORT is enabled. It provides the
+means to retrieve the boot index value from the platform. The boot index is the
+bank from which the platform has booted the firmware images.
+
+By default, the platform will read the metadata structure and try to boot from
+the active bank. If the platform fails to boot from the active bank due to
+reasons like an Authentication failure, or on crossing a set number of watchdog
+resets while booting from the active bank, the platform can then switch to boot
+from a different bank. This function then returns the bank that the platform
+should boot its images from.
+
Common optional modifications
-----------------------------
diff --git a/docs/process/commit-style.rst b/docs/process/commit-style.rst
index e9df5ce..de899ab 100644
--- a/docs/process/commit-style.rst
+++ b/docs/process/commit-style.rst
@@ -79,11 +79,10 @@
+--------------+---------------------------------------------------------------+
The permissible `scopes` are more flexible, and we maintain a list of them in
-our :download:`Commitizen configuration file <../../.cz.json>`. Scopes in this
-file are organized by their changelog section, each of which may have one or
-more accepted scopes, but only the first of which is considered to be "blessed".
-Scopes that are not blessed exist for changes submitted before scope enforcement
-came into effect, and are considered deprecated.
+our :download:`changelog configuration file <../../changelog.yaml>`. Scopes in
+this file are organized by their changelog section, where each changelog section
+has a single scope that is considered to be blessed, and possibly several
+deprecated scopes. Please avoid using deprecated scopes.
While we don't enforce scopes strictly, we do ask that commits use these if they
can, or add their own if no appropriate one exists (see :ref:`Adding Scopes`).
diff --git a/drivers/auth/auth_mod.c b/drivers/auth/auth_mod.c
index 917ee4a..a99a2c7 100644
--- a/drivers/auth/auth_mod.c
+++ b/drivers/auth/auth_mod.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -339,9 +339,6 @@
/* Check we have a valid CoT registered */
assert(cot_desc_ptr != NULL);
- /* Crypto module */
- crypto_mod_init();
-
/* Image parser module */
img_parser_init();
}
diff --git a/drivers/auth/crypto_mod.c b/drivers/auth/crypto_mod.c
index 127eb0d..eada357 100644
--- a/drivers/auth/crypto_mod.c
+++ b/drivers/auth/crypto_mod.c
@@ -46,8 +46,13 @@
{
assert(crypto_lib_desc.name != NULL);
assert(crypto_lib_desc.init != NULL);
+#if TRUSTED_BOARD_BOOT
assert(crypto_lib_desc.verify_signature != NULL);
assert(crypto_lib_desc.verify_hash != NULL);
+#endif /* TRUSTED_BOARD_BOOT */
+#if MEASURED_BOOT
+ assert(crypto_lib_desc.calc_hash != NULL);
+#endif /* MEASURED_BOOT */
/* Initialize the cryptographic library */
crypto_lib_desc.init();
diff --git a/drivers/auth/mbedtls/mbedtls_crypto.c b/drivers/auth/mbedtls/mbedtls_crypto.c
index 114e6ad..0901d04 100644
--- a/drivers/auth/mbedtls/mbedtls_crypto.c
+++ b/drivers/auth/mbedtls/mbedtls_crypto.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -60,6 +60,7 @@
mbedtls_init();
}
+#if TRUSTED_BOARD_BOOT
/*
* Verify a signature.
*
@@ -218,6 +219,7 @@
return CRYPTO_SUCCESS;
}
+#endif /* TRUSTED_BOARD_BOOT */
#if MEASURED_BOOT
/*
@@ -366,7 +368,7 @@
/*
* Register crypto library descriptor
*/
-#if MEASURED_BOOT
+#if MEASURED_BOOT && TRUSTED_BOARD_BOOT
#if TF_MBEDTLS_USE_AES_GCM
REGISTER_CRYPTO_LIB(LIB_NAME, init, verify_signature, verify_hash, calc_hash,
auth_decrypt);
@@ -374,11 +376,13 @@
REGISTER_CRYPTO_LIB(LIB_NAME, init, verify_signature, verify_hash, calc_hash,
NULL);
#endif
-#else /* MEASURED_BOOT */
+#elif TRUSTED_BOARD_BOOT
#if TF_MBEDTLS_USE_AES_GCM
REGISTER_CRYPTO_LIB(LIB_NAME, init, verify_signature, verify_hash,
auth_decrypt);
#else
REGISTER_CRYPTO_LIB(LIB_NAME, init, verify_signature, verify_hash, NULL);
#endif
-#endif /* MEASURED_BOOT */
+#elif MEASURED_BOOT
+REGISTER_CRYPTO_LIB(LIB_NAME, init, calc_hash);
+#endif /* MEASURED_BOOT && TRUSTED_BOARD_BOOT */
diff --git a/drivers/fwu/fwu.c b/drivers/fwu/fwu.c
index 7cb4c29..80f870b 100644
--- a/drivers/fwu/fwu.c
+++ b/drivers/fwu/fwu.c
@@ -142,7 +142,7 @@
{
bool trial_run = false;
- assert(is_fwu_initialized == true);
+ assert(is_fwu_initialized);
for (unsigned int i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
struct fwu_image_entry *entry = &metadata.img_entry[i];
@@ -157,6 +157,13 @@
return trial_run;
}
+const struct fwu_metadata *fwu_get_metadata(void)
+{
+ assert(is_fwu_initialized);
+
+ return &metadata;
+}
+
/*******************************************************************************
* Load verified copy of FWU metadata image kept in the platform NV storage
* into local FWU metadata structure.
diff --git a/drivers/nxp/ddr/nxp-ddr/utility.c b/drivers/nxp/ddr/nxp-ddr/utility.c
index d33ad77..b6dffc8 100644
--- a/drivers/nxp/ddr/nxp-ddr/utility.c
+++ b/drivers/nxp/ddr/nxp-ddr/utility.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2021 NXP
+ * Copyright 2021-2022 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
@@ -33,8 +33,10 @@
#define CCN_HN_F_SAM_NODEID_DDR0 0x4
#define CCN_HN_F_SAM_NODEID_DDR1 0xe
#elif defined(NXP_HAS_CCN508)
-#define CCN_HN_F_SAM_NODEID_DDR0 0x8
-#define CCN_HN_F_SAM_NODEID_DDR1 0x18
+#define CCN_HN_F_SAM_NODEID_DDR0_0 0x3
+#define CCN_HN_F_SAM_NODEID_DDR0_1 0x8
+#define CCN_HN_F_SAM_NODEID_DDR1_0 0x13
+#define CCN_HN_F_SAM_NODEID_DDR1_1 0x18
#endif
unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num)
@@ -166,10 +168,21 @@
for (i = 0; i < num_hnf_nodes; i++) {
val = mmio_read_64((uintptr_t)hnf_sam_ctrl);
+#ifdef NXP_HAS_CCN504
nodeid = disable_ddrc == 1 ? CCN_HN_F_SAM_NODEID_DDR1 :
- (disable_ddrc == 2 ? CCN_HN_F_SAM_NODEID_DDR0 :
- (i < 4 ? CCN_HN_F_SAM_NODEID_DDR0
- : CCN_HN_F_SAM_NODEID_DDR1));
+ (disable_ddrc == 2 ? CCN_HN_F_SAM_NODEID_DDR0 :
+ 0x0); /*Failure condition. never hit */
+#elif defined(NXP_HAS_CCN508)
+ if (disable_ddrc == 1) {
+ nodeid = (i < 2 || i >= 6) ? CCN_HN_F_SAM_NODEID_DDR1_1 :
+ CCN_HN_F_SAM_NODEID_DDR1_0;
+ } else if (disable_ddrc == 2) {
+ nodeid = (i < 2 || i >= 6) ? CCN_HN_F_SAM_NODEID_DDR0_0 :
+ CCN_HN_F_SAM_NODEID_DDR0_1;
+ } else {
+ nodeid = 0; /* Failure condition. never hit */
+ }
+#endif
if (nodeid != (val & CCN_HN_F_SAM_NODEID_MASK)) {
debug("Setting HN-F node %d\n", i);
debug("nodeid = 0x%x\n", nodeid);
diff --git a/drivers/partition/gpt.c b/drivers/partition/gpt.c
index 1b804de..ee0bddf 100644
--- a/drivers/partition/gpt.c
+++ b/drivers/partition/gpt.c
@@ -9,6 +9,7 @@
#include <string.h>
#include <common/debug.h>
+#include <drivers/partition/efi.h>
#include <drivers/partition/gpt.h>
#include <lib/utils.h>
@@ -57,5 +58,7 @@
entry->length = (uint64_t)(gpt_entry->last_lba -
gpt_entry->first_lba + 1) *
PLAT_PARTITION_BLOCK_SIZE;
+ guidcpy(&entry->part_guid, &gpt_entry->unique_uuid);
+
return 0;
}
diff --git a/drivers/partition/partition.c b/drivers/partition/partition.c
index fdea10d..7706f88 100644
--- a/drivers/partition/partition.c
+++ b/drivers/partition/partition.c
@@ -11,6 +11,7 @@
#include <common/debug.h>
#include <drivers/io/io_storage.h>
+#include <drivers/partition/efi.h>
#include <drivers/partition/partition.h>
#include <drivers/partition/gpt.h>
#include <drivers/partition/mbr.h>
@@ -246,6 +247,19 @@
return NULL;
}
+const partition_entry_t *get_partition_entry_by_uuid(const uuid_t *part_uuid)
+{
+ int i;
+
+ for (i = 0; i < list.entry_count; i++) {
+ if (guidcmp(part_uuid, &list.list[i].part_guid) == 0) {
+ return &list.list[i];
+ }
+ }
+
+ return NULL;
+}
+
const partition_entry_list_t *get_partition_entry_list(void)
{
return &list;
diff --git a/drivers/scmi-msg/entry.c b/drivers/scmi-msg/entry.c
index 3537fbe..399115c 100644
--- a/drivers/scmi-msg/entry.c
+++ b/drivers/scmi-msg/entry.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
- * Copyright (c) 2015-2020, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2019-2020, Linaro Limited
*/
@@ -84,7 +84,7 @@
return;
}
- ERROR("Agent %u Protocol 0x%x Message 0x%x: not supported",
+ ERROR("Agent %u Protocol 0x%x Message 0x%x: not supported\n",
msg->agent_id, msg->protocol_id, msg->message_id);
scmi_status_response(msg, SCMI_NOT_SUPPORTED);
diff --git a/drivers/st/clk/stm32mp1_clk.c b/drivers/st/clk/stm32mp1_clk.c
index 3227f1c..af8b71e 100644
--- a/drivers/st/clk/stm32mp1_clk.c
+++ b/drivers/st/clk/stm32mp1_clk.c
@@ -15,7 +15,6 @@
#include <common/fdt_wrappers.h>
#include <drivers/clk.h>
#include <drivers/delay_timer.h>
-#include <drivers/generic_delay_timer.h>
#include <drivers/st/stm32mp_clkfunc.h>
#include <drivers/st/stm32mp1_clk.h>
#include <drivers/st/stm32mp1_rcc.h>
@@ -241,6 +240,7 @@
uint8_t bit;
uint8_t index;
uint8_t set_clr;
+ uint8_t secure;
uint8_t sel; /* Relates to enum stm32mp1_parent_sel */
uint8_t fixed; /* Relates to enum stm32mp1_parent_id */
};
@@ -266,45 +266,49 @@
};
/* Clocks with selectable source and non set/clr register access */
-#define _CLK_SELEC(off, b, idx, s) \
+#define _CLK_SELEC(sec, off, b, idx, s) \
{ \
.offset = (off), \
.bit = (b), \
.index = (idx), \
.set_clr = 0, \
+ .secure = (sec), \
.sel = (s), \
.fixed = _UNKNOWN_ID, \
}
/* Clocks with fixed source and non set/clr register access */
-#define _CLK_FIXED(off, b, idx, f) \
+#define _CLK_FIXED(sec, off, b, idx, f) \
{ \
.offset = (off), \
.bit = (b), \
.index = (idx), \
.set_clr = 0, \
+ .secure = (sec), \
.sel = _UNKNOWN_SEL, \
.fixed = (f), \
}
/* Clocks with selectable source and set/clr register access */
-#define _CLK_SC_SELEC(off, b, idx, s) \
+#define _CLK_SC_SELEC(sec, off, b, idx, s) \
{ \
.offset = (off), \
.bit = (b), \
.index = (idx), \
.set_clr = 1, \
+ .secure = (sec), \
.sel = (s), \
.fixed = _UNKNOWN_ID, \
}
/* Clocks with fixed source and set/clr register access */
-#define _CLK_SC_FIXED(off, b, idx, f) \
+#define _CLK_SC_FIXED(sec, off, b, idx, f) \
{ \
.offset = (off), \
.bit = (b), \
.index = (idx), \
.set_clr = 1, \
+ .secure = (sec), \
.sel = _UNKNOWN_SEL, \
.fixed = (f), \
}
@@ -338,81 +342,94 @@
#define NB_GATES ARRAY_SIZE(stm32mp1_clk_gate)
+#define SEC 1
+#define N_S 0
+
static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
- _CLK_FIXED(RCC_DDRITFCR, 0, DDRC1, _ACLK),
- _CLK_FIXED(RCC_DDRITFCR, 1, DDRC1LP, _ACLK),
- _CLK_FIXED(RCC_DDRITFCR, 2, DDRC2, _ACLK),
- _CLK_FIXED(RCC_DDRITFCR, 3, DDRC2LP, _ACLK),
- _CLK_FIXED(RCC_DDRITFCR, 4, DDRPHYC, _PLL2_R),
- _CLK_FIXED(RCC_DDRITFCR, 5, DDRPHYCLP, _PLL2_R),
- _CLK_FIXED(RCC_DDRITFCR, 6, DDRCAPB, _PCLK4),
- _CLK_FIXED(RCC_DDRITFCR, 7, DDRCAPBLP, _PCLK4),
- _CLK_FIXED(RCC_DDRITFCR, 8, AXIDCG, _ACLK),
- _CLK_FIXED(RCC_DDRITFCR, 9, DDRPHYCAPB, _PCLK4),
- _CLK_FIXED(RCC_DDRITFCR, 10, DDRPHYCAPBLP, _PCLK4),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 0, DDRC1, _ACLK),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 1, DDRC1LP, _ACLK),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 2, DDRC2, _ACLK),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 3, DDRC2LP, _ACLK),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 4, DDRPHYC, _PLL2_R),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 5, DDRPHYCLP, _PLL2_R),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 6, DDRCAPB, _PCLK4),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 7, DDRCAPBLP, _PCLK4),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 8, AXIDCG, _ACLK),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 9, DDRPHYCAPB, _PCLK4),
+ _CLK_FIXED(SEC, RCC_DDRITFCR, 10, DDRPHYCAPBLP, _PCLK4),
- _CLK_SC_FIXED(RCC_MP_APB1ENSETR, 6, TIM12_K, _PCLK1),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 14, USART2_K, _UART24_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 15, USART3_K, _UART35_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 16, UART4_K, _UART24_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 17, UART5_K, _UART35_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 18, UART7_K, _UART78_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 19, UART8_K, _UART78_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 21, I2C1_K, _I2C12_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 22, I2C2_K, _I2C12_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 23, I2C3_K, _I2C35_SEL),
- _CLK_SC_SELEC(RCC_MP_APB1ENSETR, 24, I2C5_K, _I2C35_SEL),
+#if defined(IMAGE_BL32)
+ _CLK_SC_FIXED(N_S, RCC_MP_APB1ENSETR, 6, TIM12_K, _PCLK1),
+#endif
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 14, USART2_K, _UART24_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 15, USART3_K, _UART35_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 16, UART4_K, _UART24_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 17, UART5_K, _UART35_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 18, UART7_K, _UART78_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 19, UART8_K, _UART78_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 21, I2C1_K, _I2C12_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 22, I2C2_K, _I2C12_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 23, I2C3_K, _I2C35_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 24, I2C5_K, _I2C35_SEL),
- _CLK_SC_FIXED(RCC_MP_APB2ENSETR, 2, TIM15_K, _PCLK2),
- _CLK_SC_SELEC(RCC_MP_APB2ENSETR, 13, USART6_K, _UART6_SEL),
+#if defined(IMAGE_BL32)
+ _CLK_SC_FIXED(N_S, RCC_MP_APB2ENSETR, 2, TIM15_K, _PCLK2),
+#endif
+ _CLK_SC_SELEC(N_S, RCC_MP_APB2ENSETR, 13, USART6_K, _UART6_SEL),
- _CLK_SC_FIXED(RCC_MP_APB3ENSETR, 11, SYSCFG, _UNKNOWN_ID),
+ _CLK_SC_FIXED(N_S, RCC_MP_APB3ENSETR, 11, SYSCFG, _UNKNOWN_ID),
- _CLK_SC_SELEC(RCC_MP_APB4ENSETR, 8, DDRPERFM, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_APB4ENSETR, 15, IWDG2, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_APB4ENSETR, 16, USBPHY_K, _USBPHY_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB4ENSETR, 8, DDRPERFM, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB4ENSETR, 15, IWDG2, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_APB4ENSETR, 16, USBPHY_K, _USBPHY_SEL),
- _CLK_SC_SELEC(RCC_MP_APB5ENSETR, 0, SPI6_K, _SPI6_SEL),
- _CLK_SC_SELEC(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),
- _CLK_SC_SELEC(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL),
- _CLK_SC_SELEC(RCC_MP_APB5ENSETR, 4, USART1_K, _UART1_SEL),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 11, TZC1, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 12, TZC2, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 13, TZPC, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 15, IWDG1, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_APB5ENSETR, 16, BSEC, _PCLK5),
- _CLK_SC_SELEC(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL),
+ _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 0, SPI6_K, _SPI6_SEL),
+ _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),
+ _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL),
+ _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 4, USART1_K, _UART1_SEL),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 11, TZC1, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 12, TZC2, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 13, TZPC, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 15, IWDG1, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 16, BSEC, _PCLK5),
+ _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB2ENSETR, 8, USBO_K, _USBO_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB2ENSETR, 16, SDMMC3_K, _SDMMC3_SEL),
+#if defined(IMAGE_BL32)
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB2ENSETR, 8, USBO_K, _USBO_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB2ENSETR, 16, SDMMC3_K, _SDMMC3_SEL),
+#endif
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 2, GPIOC, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 3, GPIOD, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 4, GPIOE, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 5, GPIOF, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 6, GPIOG, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 7, GPIOH, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 8, GPIOI, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 9, GPIOJ, _UNKNOWN_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB4ENSETR, 10, GPIOK, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 2, GPIOC, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 3, GPIOD, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 4, GPIOE, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 5, GPIOF, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 6, GPIOG, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 7, GPIOH, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 8, GPIOI, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 9, GPIOJ, _UNKNOWN_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 10, GPIOK, _UNKNOWN_SEL),
- _CLK_SC_FIXED(RCC_MP_AHB5ENSETR, 0, GPIOZ, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_AHB5ENSETR, 4, CRYP1, _PCLK5),
- _CLK_SC_FIXED(RCC_MP_AHB5ENSETR, 5, HASH1, _PCLK5),
- _CLK_SC_SELEC(RCC_MP_AHB5ENSETR, 6, RNG1_K, _RNG1_SEL),
- _CLK_SC_FIXED(RCC_MP_AHB5ENSETR, 8, BKPSRAM, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 0, GPIOZ, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 4, CRYP1, _PCLK5),
+ _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 5, HASH1, _PCLK5),
+ _CLK_SC_SELEC(SEC, RCC_MP_AHB5ENSETR, 6, RNG1_K, _RNG1_SEL),
+ _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 8, BKPSRAM, _PCLK5),
- _CLK_SC_SELEC(RCC_MP_AHB6ENSETR, 12, FMC_K, _FMC_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB6ENSETR, 14, QSPI_K, _QSPI_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB6ENSETR, 16, SDMMC1_K, _SDMMC12_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB6ENSETR, 17, SDMMC2_K, _SDMMC12_SEL),
- _CLK_SC_SELEC(RCC_MP_AHB6ENSETR, 24, USBH, _UNKNOWN_SEL),
+#if defined(IMAGE_BL2)
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB6ENSETR, 12, FMC_K, _FMC_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB6ENSETR, 14, QSPI_K, _QSPI_SEL),
+#endif
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB6ENSETR, 16, SDMMC1_K, _SDMMC12_SEL),
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB6ENSETR, 17, SDMMC2_K, _SDMMC12_SEL),
+#if defined(IMAGE_BL32)
+ _CLK_SC_SELEC(N_S, RCC_MP_AHB6ENSETR, 24, USBH, _UNKNOWN_SEL),
+#endif
- _CLK_SELEC(RCC_BDCR, 20, RTC, _RTC_SEL),
- _CLK_SELEC(RCC_DBGCFGR, 8, CK_DBG, _UNKNOWN_SEL),
+ _CLK_SELEC(SEC, RCC_BDCR, 20, RTC, _RTC_SEL),
+ _CLK_SELEC(N_S, RCC_DBGCFGR, 8, CK_DBG, _UNKNOWN_SEL),
};
static const uint8_t i2c12_parents[] = {
@@ -628,6 +645,13 @@
return &stm32mp1_clk_gate[idx];
}
+#if defined(IMAGE_BL32)
+static bool gate_is_non_secure(const struct stm32mp1_clk_gate *gate)
+{
+ return gate->secure == N_S;
+}
+#endif
+
static const struct stm32mp1_clk_sel *clk_sel_ref(unsigned int idx)
{
return &stm32mp1_clk_sel[idx];
@@ -1062,17 +1086,6 @@
return mmio_read_32(rcc_base + gate->offset) & BIT(gate->bit);
}
-unsigned int stm32mp1_clk_get_refcount(unsigned long id)
-{
- int i = stm32mp1_clk_get_gated_id(id);
-
- if (i < 0) {
- panic();
- }
-
- return gate_refcounts[i];
-}
-
/* Oscillators and PLLs are not gated at runtime */
static bool clock_is_always_on(unsigned long id)
{
@@ -1101,11 +1114,10 @@
}
}
-void __stm32mp1_clk_enable(unsigned long id, bool secure)
+static void __stm32mp1_clk_enable(unsigned long id, bool with_refcnt)
{
const struct stm32mp1_clk_gate *gate;
int i;
- unsigned int *refcnt;
if (clock_is_always_on(id)) {
return;
@@ -1118,22 +1130,39 @@
}
gate = gate_ref(i);
- refcnt = &gate_refcounts[i];
+
+ if (!with_refcnt) {
+ __clk_enable(gate);
+ return;
+ }
+
+#if defined(IMAGE_BL32)
+ if (gate_is_non_secure(gate)) {
+ /* Enable non-secure clock w/o any refcounting */
+ __clk_enable(gate);
+ return;
+ }
+#endif
stm32mp1_clk_lock(&refcount_lock);
- if (stm32mp_incr_shrefcnt(refcnt, secure) != 0) {
+ if (gate_refcounts[i] == 0U) {
__clk_enable(gate);
}
+ gate_refcounts[i]++;
+ if (gate_refcounts[i] == UINT_MAX) {
+ ERROR("Clock %lu refcount reached max value\n", id);
+ panic();
+ }
+
stm32mp1_clk_unlock(&refcount_lock);
}
-void __stm32mp1_clk_disable(unsigned long id, bool secure)
+static void __stm32mp1_clk_disable(unsigned long id, bool with_refcnt)
{
const struct stm32mp1_clk_gate *gate;
int i;
- unsigned int *refcnt;
if (clock_is_always_on(id)) {
return;
@@ -1146,11 +1175,28 @@
}
gate = gate_ref(i);
- refcnt = &gate_refcounts[i];
+
+ if (!with_refcnt) {
+ __clk_disable(gate);
+ return;
+ }
+
+#if defined(IMAGE_BL32)
+ if (gate_is_non_secure(gate)) {
+ /* Don't disable non-secure clocks */
+ return;
+ }
+#endif
stm32mp1_clk_lock(&refcount_lock);
- if (stm32mp_decr_shrefcnt(refcnt, secure) != 0) {
+ if (gate_refcounts[i] == 0U) {
+ ERROR("Clock %lu refcount reached 0\n", id);
+ panic();
+ }
+ gate_refcounts[i]--;
+
+ if (gate_refcounts[i] == 0U) {
__clk_disable(gate);
}
@@ -1718,52 +1764,8 @@
if (lse_css) {
mmio_setbits_32(address, RCC_BDCR_LSECSSON);
}
-}
-
-static void stm32mp1_stgen_config(void)
-{
- uint32_t cntfid0;
- unsigned long rate;
- unsigned long long counter;
-
- cntfid0 = mmio_read_32(STGEN_BASE + CNTFID_OFF);
- rate = get_clock_rate(stm32mp1_clk_get_parent(STGEN_K));
-
- if (cntfid0 == rate) {
- return;
- }
-
- mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
- counter = (unsigned long long)mmio_read_32(STGEN_BASE + CNTCVL_OFF);
- counter |= ((unsigned long long)mmio_read_32(STGEN_BASE + CNTCVU_OFF)) << 32;
- counter = (counter * rate / cntfid0);
-
- mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)counter);
- mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(counter >> 32));
- mmio_write_32(STGEN_BASE + CNTFID_OFF, rate);
- mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
-
- write_cntfrq((u_register_t)rate);
-
- /* Need to update timer with new frequency */
- generic_delay_timer_init();
}
-void stm32mp1_stgen_increment(unsigned long long offset_in_ms)
-{
- unsigned long long cnt;
-
- cnt = ((unsigned long long)mmio_read_32(STGEN_BASE + CNTCVU_OFF) << 32) |
- mmio_read_32(STGEN_BASE + CNTCVL_OFF);
-
- cnt += (offset_in_ms * mmio_read_32(STGEN_BASE + CNTFID_OFF)) / 1000U;
-
- mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
- mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)cnt);
- mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(cnt >> 32));
- mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
-}
-
static void stm32mp1_pkcs_config(uint32_t pkcs)
{
uintptr_t address = stm32mp_rcc_base() + ((pkcs >> 4) & 0xFFFU);
@@ -1959,7 +1961,8 @@
if (ret != 0) {
return ret;
}
- stm32mp1_stgen_config();
+
+ stm32mp_stgen_config(stm32mp_clk_get_rate(STGEN_K));
}
/* Select DIV */
@@ -2133,7 +2136,8 @@
if (stm32mp1_osc[_HSI] == 0U) {
stm32mp1_hsi_set(false);
}
- stm32mp1_stgen_config();
+
+ stm32mp_stgen_config(stm32mp_clk_get_rate(STGEN_K));
/* Software Self-Refresh mode (SSR) during DDR initilialization */
mmio_clrsetbits_32(rcc_base + RCC_DDRITFCR,
diff --git a/drivers/st/clk/stm32mp_clkfunc.c b/drivers/st/clk/stm32mp_clkfunc.c
index 5ba64fd..a013a82 100644
--- a/drivers/st/clk/stm32mp_clkfunc.c
+++ b/drivers/st/clk/stm32mp_clkfunc.c
@@ -6,10 +6,13 @@
#include <errno.h>
+#include <arch_helpers.h>
#include <common/fdt_wrappers.h>
#include <drivers/clk.h>
+#include <drivers/generic_delay_timer.h>
#include <drivers/st/stm32_gpio.h>
#include <drivers/st/stm32mp_clkfunc.h>
+#include <lib/mmio.h>
#include <libfdt.h>
#include <platform_def.h>
@@ -318,3 +321,60 @@
return clk_get_rate((unsigned long)clk_id);
}
+
+/*******************************************************************************
+ * This function configures and restores the STGEN counter depending on the
+ * connected clock.
+ ******************************************************************************/
+void stm32mp_stgen_config(unsigned long rate)
+{
+ uint32_t cntfid0;
+ unsigned long long counter;
+
+ cntfid0 = mmio_read_32(STGEN_BASE + CNTFID_OFF);
+
+ if (cntfid0 == rate) {
+ return;
+ }
+
+ mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
+ counter = stm32mp_stgen_get_counter() * rate / cntfid0;
+
+ mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)counter);
+ mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(counter >> 32));
+ mmio_write_32(STGEN_BASE + CNTFID_OFF, rate);
+ mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
+
+ write_cntfrq_el0(rate);
+
+ /* Need to update timer with new frequency */
+ generic_delay_timer_init();
+}
+
+/*******************************************************************************
+ * This function returns the STGEN counter value.
+ ******************************************************************************/
+unsigned long long stm32mp_stgen_get_counter(void)
+{
+ return (((unsigned long long)mmio_read_32(STGEN_BASE + CNTCVU_OFF) << 32) |
+ mmio_read_32(STGEN_BASE + CNTCVL_OFF));
+}
+
+/*******************************************************************************
+ * This function restores the STGEN counter value.
+ * It takes a first input value as a counter backup value to be restored and a
+ * offset in ms to be added.
+ ******************************************************************************/
+void stm32mp_stgen_restore_counter(unsigned long long value,
+ unsigned long long offset_in_ms)
+{
+ unsigned long long cnt;
+
+ cnt = value + ((offset_in_ms *
+ mmio_read_32(STGEN_BASE + CNTFID_OFF)) / 1000U);
+
+ mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
+ mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)cnt);
+ mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(cnt >> 32));
+ mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN);
+}
diff --git a/drivers/st/ddr/stm32mp_ddr.c b/drivers/st/ddr/stm32mp_ddr.c
index ffc85ea..6776e3b 100644
--- a/drivers/st/ddr/stm32mp_ddr.c
+++ b/drivers/st/ddr/stm32mp_ddr.c
@@ -4,6 +4,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/debug.h>
#include <drivers/delay_timer.h>
#include <drivers/st/stm32mp_ddr.h>
#include <drivers/st/stm32mp_ddrctrl_regs.h>
diff --git a/drivers/st/ddr/stm32mp_ddr_test.c b/drivers/st/ddr/stm32mp_ddr_test.c
index 6b98095..6733cc6 100644
--- a/drivers/st/ddr/stm32mp_ddr_test.c
+++ b/drivers/st/ddr/stm32mp_ddr_test.c
@@ -4,6 +4,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/debug.h>
#include <drivers/st/stm32mp_ddr_test.h>
#include <lib/mmio.h>
diff --git a/drivers/st/ddr/stm32mp_ram.c b/drivers/st/ddr/stm32mp_ram.c
index 1e555ad..0804568 100644
--- a/drivers/st/ddr/stm32mp_ram.c
+++ b/drivers/st/ddr/stm32mp_ram.c
@@ -7,6 +7,7 @@
#include <errno.h>
#include <stdbool.h>
+#include <common/debug.h>
#include <common/fdt_wrappers.h>
#include <drivers/st/stm32mp_ram.h>
#include <libfdt.h>
diff --git a/drivers/st/regulator/regulator_core.c b/drivers/st/regulator/regulator_core.c
index 94b3cef..5cc8329 100644
--- a/drivers/st/regulator/regulator_core.c
+++ b/drivers/st/regulator/regulator_core.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -156,6 +156,10 @@
assert(rdev != NULL);
+ if (rdev->flags & REGUL_ALWAYS_ON) {
+ return 0;
+ }
+
ret = __regulator_set_state(rdev, STATE_DISABLE);
udelay(rdev->enable_ramp_delay);
@@ -412,6 +416,21 @@
return 0;
}
+static int parse_properties(const void *fdt, struct rdev *rdev, int node)
+{
+ int ret;
+
+ if (fdt_getprop(fdt, node, "regulator-always-on", NULL) != NULL) {
+ VERBOSE("%s: set regulator-always-on\n", rdev->desc->node_name);
+ ret = regulator_set_flag(rdev, REGUL_ALWAYS_ON);
+ if (ret != 0) {
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
/*
* Parse the device-tree for a regulator
*
@@ -476,6 +495,11 @@
return ret;
}
+ ret = parse_properties(fdt, rdev, node);
+ if (ret != 0) {
+ return ret;
+ }
+
return 0;
}
diff --git a/fdts/stm32mp15-bl2.dtsi b/fdts/stm32mp15-bl2.dtsi
index 074414b..d00e35b 100644
--- a/fdts/stm32mp15-bl2.dtsi
+++ b/fdts/stm32mp15-bl2.dtsi
@@ -1,12 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright (C) STMicroelectronics 2020-2021 - All Rights Reserved
+ * Copyright (C) STMicroelectronics 2020-2022 - All Rights Reserved
*/
/ {
#if !STM32MP_EMMC && !STM32MP_SDMMC
aliases {
/delete-property/ mmc0;
+ /delete-property/ mmc1;
};
#endif
diff --git a/include/drivers/auth/auth_mod.h b/include/drivers/auth/auth_mod.h
index d1fd52c..94537f6 100644
--- a/include/drivers/auth/auth_mod.h
+++ b/include/drivers/auth/auth_mod.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,8 +7,6 @@
#ifndef AUTH_MOD_H
#define AUTH_MOD_H
-#if TRUSTED_BOARD_BOOT
-
#include <common/tbbr/cot_def.h>
#include <common/tbbr/tbbr_img_def.h>
#include <drivers/auth/auth_common.h>
@@ -46,7 +44,13 @@
#endif /* COT_DESC_IN_DTB && !IMAGE_BL1 */
/* Public functions */
+#if TRUSTED_BOARD_BOOT
void auth_mod_init(void);
+#else
+static inline void auth_mod_init(void)
+{
+}
+#endif /* TRUSTED_BOARD_BOOT */
int auth_mod_get_parent_id(unsigned int img_id, unsigned int *parent_id);
int auth_mod_verify_img(unsigned int img_id,
void *img_ptr,
@@ -85,6 +89,4 @@
#endif
-#endif /* TRUSTED_BOARD_BOOT */
-
#endif /* AUTH_MOD_H */
diff --git a/include/drivers/auth/crypto_mod.h b/include/drivers/auth/crypto_mod.h
index cdcf504..73b2b99 100644
--- a/include/drivers/auth/crypto_mod.h
+++ b/include/drivers/auth/crypto_mod.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -76,7 +76,14 @@
} crypto_lib_desc_t;
/* Public functions */
+#if CRYPTO_SUPPORT
void crypto_mod_init(void);
+#else
+static inline void crypto_mod_init(void)
+{
+}
+#endif /* CRYPTO_SUPPORT */
+
int crypto_mod_verify_signature(void *data_ptr, unsigned int data_len,
void *sig_ptr, unsigned int sig_len,
void *sig_alg_ptr, unsigned int sig_alg_len,
@@ -93,7 +100,9 @@
int crypto_mod_calc_hash(enum crypto_md_algo alg, void *data_ptr,
unsigned int data_len,
unsigned char output[CRYPTO_MD_MAX_SIZE]);
+#endif /* MEASURED_BOOT */
+#if MEASURED_BOOT && TRUSTED_BOARD_BOOT
/* Macro to register a cryptographic library */
#define REGISTER_CRYPTO_LIB(_name, _init, _verify_signature, _verify_hash, \
_calc_hash, _auth_decrypt) \
@@ -105,7 +114,7 @@
.calc_hash = _calc_hash, \
.auth_decrypt = _auth_decrypt \
}
-#else
+#elif TRUSTED_BOARD_BOOT
#define REGISTER_CRYPTO_LIB(_name, _init, _verify_signature, _verify_hash, \
_auth_decrypt) \
const crypto_lib_desc_t crypto_lib_desc = { \
@@ -115,7 +124,14 @@
.verify_hash = _verify_hash, \
.auth_decrypt = _auth_decrypt \
}
+#elif MEASURED_BOOT
+#define REGISTER_CRYPTO_LIB(_name, _init, _calc_hash) \
+ const crypto_lib_desc_t crypto_lib_desc = { \
+ .name = _name, \
+ .init = _init, \
+ .calc_hash = _calc_hash, \
+ }
-#endif /* MEASURED_BOOT */
+#endif /* MEASURED_BOOT && TRUSTED_BOARD_BOOT */
extern const crypto_lib_desc_t crypto_lib_desc;
diff --git a/include/drivers/fwu/fwu.h b/include/drivers/fwu/fwu.h
index ae06da9..9f18e22 100644
--- a/include/drivers/fwu/fwu.h
+++ b/include/drivers/fwu/fwu.h
@@ -11,5 +11,6 @@
void fwu_init(void);
bool fwu_is_trial_run_state(void);
+const struct fwu_metadata *fwu_get_metadata(void);
#endif /* FWU_H */
diff --git a/include/drivers/partition/efi.h b/include/drivers/partition/efi.h
new file mode 100644
index 0000000..e463f96
--- /dev/null
+++ b/include/drivers/partition/efi.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2021, Linaro Limited
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef DRIVERS_PARTITION_EFI_H
+#define DRIVERS_PARTITION_EFI_H
+
+#include <string.h>
+
+#include <tools_share/uuid.h>
+
+#define EFI_NAMELEN 36
+
+static inline int guidcmp(const void *g1, const void *g2)
+{
+ return memcmp(g1, g2, sizeof(struct efi_guid));
+}
+
+static inline void *guidcpy(void *dst, const void *src)
+{
+ return memcpy(dst, src, sizeof(struct efi_guid));
+}
+
+#define EFI_GUID(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
+ { (a) & 0xffffffff, \
+ (b) & 0xffff, \
+ (c) & 0xffff, \
+ { (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } }
+
+#define NULL_GUID \
+ EFI_GUID(0x00000000, 0x0000, 0x0000, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00)
+
+#endif /* DRIVERS_PARTITION_EFI_H */
diff --git a/include/drivers/partition/gpt.h b/include/drivers/partition/gpt.h
index d923e95..c2a229e 100644
--- a/include/drivers/partition/gpt.h
+++ b/include/drivers/partition/gpt.h
@@ -7,19 +7,20 @@
#ifndef GPT_H
#define GPT_H
+#include <drivers/partition/efi.h>
#include <drivers/partition/partition.h>
+#include <tools_share/uuid.h>
#define PARTITION_TYPE_GPT 0xee
#define GPT_HEADER_OFFSET PLAT_PARTITION_BLOCK_SIZE
#define GPT_ENTRY_OFFSET (GPT_HEADER_OFFSET + \
PLAT_PARTITION_BLOCK_SIZE)
-#define GUID_LEN 16
#define GPT_SIGNATURE "EFI PART"
typedef struct gpt_entry {
- unsigned char type_uuid[GUID_LEN];
- unsigned char unique_uuid[GUID_LEN];
+ struct efi_guid type_uuid;
+ struct efi_guid unique_uuid;
unsigned long long first_lba;
unsigned long long last_lba;
unsigned long long attr;
@@ -36,7 +37,7 @@
unsigned long long backup_lba;
unsigned long long first_lba;
unsigned long long last_lba;
- unsigned char disk_uuid[16];
+ struct efi_guid disk_uuid;
/* starting LBA of array of partition entries */
unsigned long long part_lba;
/* number of partition entries in array */
diff --git a/include/drivers/partition/partition.h b/include/drivers/partition/partition.h
index 5f64833..b292ec7 100644
--- a/include/drivers/partition/partition.h
+++ b/include/drivers/partition/partition.h
@@ -10,6 +10,8 @@
#include <stdint.h>
#include <lib/cassert.h>
+#include <drivers/partition/efi.h>
+#include <tools_share/uuid.h>
#if !PLAT_PARTITION_MAX_ENTRIES
# define PLAT_PARTITION_MAX_ENTRIES 128
@@ -27,12 +29,11 @@
#define LEGACY_PARTITION_BLOCK_SIZE 512
-#define EFI_NAMELEN 36
-
typedef struct partition_entry {
uint64_t start;
uint64_t length;
char name[EFI_NAMELEN];
+ struct efi_guid part_guid;
} partition_entry_t;
typedef struct partition_entry_list {
@@ -42,6 +43,7 @@
int load_partition_table(unsigned int image_id);
const partition_entry_t *get_partition_entry(const char *name);
+const partition_entry_t *get_partition_entry_by_uuid(const uuid_t *part_uuid);
const partition_entry_list_t *get_partition_entry_list(void);
void partition_init(unsigned int image_id);
diff --git a/include/drivers/st/stm32mp1_clk.h b/include/drivers/st/stm32mp1_clk.h
index c46892b..e2395bc 100644
--- a/include/drivers/st/stm32mp1_clk.h
+++ b/include/drivers/st/stm32mp1_clk.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2018-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -28,37 +28,10 @@
bool stm32mp1_rcc_is_secure(void);
bool stm32mp1_rcc_is_mckprot(void);
-void __stm32mp1_clk_enable(unsigned long id, bool caller_is_secure);
-void __stm32mp1_clk_disable(unsigned long id, bool caller_is_secure);
-
-static inline void stm32mp1_clk_enable_non_secure(unsigned long id)
-{
- __stm32mp1_clk_enable(id, false);
-}
-
-static inline void stm32mp1_clk_enable_secure(unsigned long id)
-{
- __stm32mp1_clk_enable(id, true);
-}
-
-static inline void stm32mp1_clk_disable_non_secure(unsigned long id)
-{
- __stm32mp1_clk_disable(id, false);
-}
-
-static inline void stm32mp1_clk_disable_secure(unsigned long id)
-{
- __stm32mp1_clk_disable(id, true);
-}
-
-unsigned int stm32mp1_clk_get_refcount(unsigned long id);
-
/* SMP protection on RCC registers access */
void stm32mp1_clk_rcc_regs_lock(void);
void stm32mp1_clk_rcc_regs_unlock(void);
-void stm32mp1_stgen_increment(unsigned long long offset_in_ms);
-
#ifdef STM32MP_SHARED_RESOURCES
void stm32mp1_register_clock_parents_secure(unsigned long id);
#endif
diff --git a/include/drivers/st/stm32mp_clkfunc.h b/include/drivers/st/stm32mp_clkfunc.h
index 4876213..9df38d6 100644
--- a/include/drivers/st/stm32mp_clkfunc.h
+++ b/include/drivers/st/stm32mp_clkfunc.h
@@ -28,4 +28,9 @@
int fdt_get_clock_id(int node);
unsigned long fdt_get_uart_clock_freq(uintptr_t instance);
+void stm32mp_stgen_config(unsigned long rate);
+void stm32mp_stgen_restore_counter(unsigned long long value,
+ unsigned long long offset_in_ms);
+unsigned long long stm32mp_stgen_get_counter(void);
+
#endif /* STM32MP_CLKFUNC_H */
diff --git a/include/lib/cpus/aarch64/neoverse_poseidon.h b/include/lib/cpus/aarch64/neoverse_poseidon.h
new file mode 100644
index 0000000..0a8b1d1
--- /dev/null
+++ b/include/lib/cpus/aarch64/neoverse_poseidon.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2022, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef NEOVERSE_POSEIDON_H
+#define NEOVERSE_POSEIDON_H
+
+
+#define NEOVERSE_POSEIDON_MIDR U(0x410FD830)
+
+/*******************************************************************************
+ * CPU Extended Control register specific definitions.
+ ******************************************************************************/
+#define NEOVERSE_POSEIDON_CPUECTLR_EL1 S3_0_C15_C1_4
+
+/*******************************************************************************
+ * CPU Power Control register specific definitions
+ ******************************************************************************/
+#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1 S3_0_C15_C2_7
+#define NEOVERSE_POSEIDON_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
+
+#endif /* NEOVERSE_POSEIDON_H */
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index 9a61b50..509fd58 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -389,6 +389,7 @@
int plat_fwu_set_metadata_image_source(unsigned int image_id,
uintptr_t *dev_handle,
uintptr_t *image_spec);
-void plat_fwu_set_images_source(struct fwu_metadata *metadata);
+void plat_fwu_set_images_source(const struct fwu_metadata *metadata);
+uint32_t plat_fwu_get_boot_idx(void);
#endif /* PLATFORM_H */
diff --git a/lib/cpus/aarch64/neoverse_poseidon.S b/lib/cpus/aarch64/neoverse_poseidon.S
new file mode 100644
index 0000000..43a93aa
--- /dev/null
+++ b/lib/cpus/aarch64/neoverse_poseidon.S
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <common/bl_common.h>
+#include <neoverse_poseidon.h>
+#include <cpu_macros.S>
+#include <plat_macros.S>
+
+/* Hardware handled coherency */
+#if HW_ASSISTED_COHERENCY == 0
+#error "Neoverse Poseidon must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Neoverse Poseidon supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
+ /* ---------------------------------------------
+ * HW will do the cache maintenance while powering down
+ * ---------------------------------------------
+ */
+func neoverse_poseidon_core_pwr_dwn
+ /* ---------------------------------------------
+ * Enable CPU power down bit in power control register
+ * ---------------------------------------------
+ */
+ mrs x0, NEOVERSE_POSEIDON_CPUPWRCTLR_EL1
+ orr x0, x0, #NEOVERSE_POSEIDON_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
+ msr NEOVERSE_POSEIDON_CPUPWRCTLR_EL1, x0
+ isb
+ ret
+endfunc neoverse_poseidon_core_pwr_dwn
+
+#if REPORT_ERRATA
+ /*
+ * Errata printing function for Neoverse Poseidon. Must follow AAPCS.
+ */
+func neoverse_poseidon_errata_report
+ ret
+endfunc neoverse_poseidon_errata_report
+#endif
+
+func neoverse_poseidon_reset_func
+ /* Disable speculative loads */
+ msr SSBS, xzr
+ isb
+ ret
+endfunc neoverse_poseidon_reset_func
+
+ /* ---------------------------------------------
+ * This function provides Neoverse-Poseidon specific
+ * register information for crash reporting.
+ * It needs to return with x6 pointing to
+ * a list of register names in ascii and
+ * x8 - x15 having values of registers to be
+ * reported.
+ * ---------------------------------------------
+ */
+.section .rodata.neoverse_poseidon_regs, "aS"
+neoverse_poseidon_regs: /* The ascii list of register names to be reported */
+ .asciz "cpuectlr_el1", ""
+
+func neoverse_poseidon_cpu_reg_dump
+ adr x6, neoverse_poseidon_regs
+ mrs x8, NEOVERSE_POSEIDON_CPUECTLR_EL1
+ ret
+endfunc neoverse_poseidon_cpu_reg_dump
+
+declare_cpu_ops neoverse_poseidon, NEOVERSE_POSEIDON_MIDR, \
+ neoverse_poseidon_reset_func, \
+ neoverse_poseidon_core_pwr_dwn
diff --git a/package-lock.json b/package-lock.json
index 1d95ac9..469c5f5 100644
--- a/package-lock.json
+++ b/package-lock.json
@@ -1,22 +1,26 @@
{
"name": "trusted-firmware-a",
- "version": "2.5.0",
+ "version": "2.6.0",
"lockfileVersion": 2,
"requires": true,
"packages": {
"": {
"name": "trusted-firmware-a",
- "version": "2.5.0",
+ "version": "2.6.0",
"hasInstallScript": true,
"license": "BSD-3-Clause",
"devDependencies": {
- "@commitlint/cli": "^14.1.0",
- "@commitlint/config-conventional": "^14.1.0",
+ "@commitlint/cli": "^16.1.0",
+ "@commitlint/config-conventional": "^16.0.0",
+ "@commitlint/cz-commitlint": "^16.1.0",
"commitizen": "^4.2.4",
"conventional-changelog-tf-a": "file:tools/conventional-changelog-tf-a",
- "cz-conventional-changelog": "^3.3.0",
"husky": "^7.0.4",
+ "js-yaml": "^4.1.0",
"standard-version": "^9.3.2"
+ },
+ "engines": {
+ "node": ">=16.0.0"
}
},
"node_modules/@babel/code-frame": {
@@ -108,16 +112,16 @@
}
},
"node_modules/@commitlint/cli": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/cli/-/cli-14.1.0.tgz",
- "integrity": "sha512-Orq62jkl9qAGvjFqhehtAqjGY/duJ8hIRPPIHmGR2jIB96D4VTmazS3ZvqJz2Q9kKr61mLAk/171zm0FVzQCYA==",
+ "version": "16.1.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/cli/-/cli-16.1.0.tgz",
+ "integrity": "sha512-x5L1knvA3isRWBRVQx+Q6D45pA9139a2aZQYpxkljMG0dj4UHZkCnsYWpnGalxPxASI7nrI0KedKfS2YeQ55cQ==",
"dev": true,
"dependencies": {
- "@commitlint/format": "^14.1.0",
- "@commitlint/lint": "^14.1.0",
- "@commitlint/load": "^14.1.0",
- "@commitlint/read": "^14.0.0",
- "@commitlint/types": "^14.0.0",
+ "@commitlint/format": "^16.0.0",
+ "@commitlint/lint": "^16.0.0",
+ "@commitlint/load": "^16.1.0",
+ "@commitlint/read": "^16.0.0",
+ "@commitlint/types": "^16.0.0",
"lodash": "^4.17.19",
"resolve-from": "5.0.0",
"resolve-global": "1.0.0",
@@ -131,9 +135,9 @@
}
},
"node_modules/@commitlint/config-conventional": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/config-conventional/-/config-conventional-14.1.0.tgz",
- "integrity": "sha512-JuhCqkEv8jyqmd54EpXPsQFpYc/8k7sfP1UziRdEvZSJUCLxz+8Pk4cNS0oF1BtjaWO7ITgXPlIZg47PyApGmg==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/config-conventional/-/config-conventional-16.0.0.tgz",
+ "integrity": "sha512-mN7J8KlKFn0kROd+q9PB01sfDx/8K/R25yITspL1No8PB4oj9M1p77xWjP80hPydqZG9OvQq+anXK3ZWeR7s3g==",
"dev": true,
"dependencies": {
"conventional-changelog-conventionalcommits": "^4.3.1"
@@ -142,13 +146,47 @@
"node": ">=v12"
}
},
+ "node_modules/@commitlint/config-validator": {
+ "version": "16.1.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/config-validator/-/config-validator-16.1.0.tgz",
+ "integrity": "sha512-2cHeZPNTuf1JWbMqyA46MkExor5HMSgv8JrdmzEakUbJHUreh35/wN00FJf57qGs134exQW2thiSQ1IJUsVx2Q==",
+ "dev": true,
+ "dependencies": {
+ "@commitlint/types": "^16.0.0",
+ "ajv": "^6.12.6"
+ },
+ "engines": {
+ "node": ">=v12"
+ }
+ },
+ "node_modules/@commitlint/cz-commitlint": {
+ "version": "16.1.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/cz-commitlint/-/cz-commitlint-16.1.0.tgz",
+ "integrity": "sha512-TThglfXEBW8TZ99dvaeto1c6hU25ONqL9qkENle2+1OFI64NgbICjLsJq7SVzJd4Jn/yZDp4xNqoV53WJPJ9aA==",
+ "dev": true,
+ "dependencies": {
+ "@commitlint/ensure": "^16.0.0",
+ "@commitlint/load": "^16.1.0",
+ "@commitlint/types": "^16.0.0",
+ "chalk": "^4.1.0",
+ "lodash": "^4.17.21",
+ "word-wrap": "^1.2.3"
+ },
+ "engines": {
+ "node": ">= 10"
+ },
+ "peerDependencies": {
+ "commitizen": "^4.0.3",
+ "inquirer": "^8.0.0"
+ }
+ },
"node_modules/@commitlint/ensure": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/ensure/-/ensure-14.1.0.tgz",
- "integrity": "sha512-xrYvFdqVepT3XA1BmSh88eKbvYKtLuQu98QLfgxVmwS99Kj3yW0sT3D7jGvNsynbIx2dhbXofDyubf/DKkpFrQ==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/ensure/-/ensure-16.0.0.tgz",
+ "integrity": "sha512-WdMySU8DCTaq3JPf0tZFCKIUhqxaL54mjduNhu8v4D2AMUVIIQKYMGyvXn94k8begeW6iJkTf9cXBArayskE7Q==",
"dev": true,
"dependencies": {
- "@commitlint/types": "^14.0.0",
+ "@commitlint/types": "^16.0.0",
"lodash": "^4.17.19"
},
"engines": {
@@ -156,21 +194,21 @@
}
},
"node_modules/@commitlint/execute-rule": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/execute-rule/-/execute-rule-14.0.0.tgz",
- "integrity": "sha512-Hh/HLpCBDlrD3Rx2x2pDBx6CU+OtVqGXh7mbFpNihAVx6B0zyZqm/vv0cdwdhfGW5OEn1BhCqHf1ZOvL/DwdWA==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/execute-rule/-/execute-rule-16.0.0.tgz",
+ "integrity": "sha512-8edcCibmBb386x5JTHSPHINwA5L0xPkHQFY8TAuDEt5QyRZY/o5DF8OPHSa5Hx2xJvGaxxuIz4UtAT6IiRDYkw==",
"dev": true,
"engines": {
"node": ">=v12"
}
},
"node_modules/@commitlint/format": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/format/-/format-14.1.0.tgz",
- "integrity": "sha512-sF6engqqHjvxGctWRKjFs/HQeNowlpbVmmoP481b2UMQnVQnjjfXJvQsoLpaqFUvgc2sHM4L85F8BmAw+iHG1w==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/format/-/format-16.0.0.tgz",
+ "integrity": "sha512-9yp5NCquXL1jVMKL0ZkRwJf/UHdebvCcMvICuZV00NQGYSAL89O398nhqrqxlbjBhM5EZVq0VGcV5+7r3D4zAA==",
"dev": true,
"dependencies": {
- "@commitlint/types": "^14.0.0",
+ "@commitlint/types": "^16.0.0",
"chalk": "^4.0.0"
},
"engines": {
@@ -178,12 +216,12 @@
}
},
"node_modules/@commitlint/is-ignored": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/is-ignored/-/is-ignored-14.0.0.tgz",
- "integrity": "sha512-nJltYjXTa+mk+6SPe35nOZCCvt3Gh5mbDz008KQ4OPcn1GX1NG+pEgz1Kx3agDp/pc+JGnsrr5GV00gygIoloA==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/is-ignored/-/is-ignored-16.0.0.tgz",
+ "integrity": "sha512-gmAQcwIGC/R/Lp0CEb2b5bfGC7MT5rPe09N8kOGjO/NcdNmfFSZMquwrvNJsq9hnAP0skRdHIsqwlkENkN4Lag==",
"dev": true,
"dependencies": {
- "@commitlint/types": "^14.0.0",
+ "@commitlint/types": "^16.0.0",
"semver": "7.3.5"
},
"engines": {
@@ -191,32 +229,33 @@
}
},
"node_modules/@commitlint/lint": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/lint/-/lint-14.1.0.tgz",
- "integrity": "sha512-CApGJEOtWU/CcuPD8HkOR1jdUYpjKutGPaeby9nSFzJhwl/UQOjxc4Nd+2g2ygsMi5l3N4j2sWQYEgccpFC3lA==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/lint/-/lint-16.0.0.tgz",
+ "integrity": "sha512-HNl15bRC0h+pLzbMzQC3tM0j1aESXsLYhElqKnXcf5mnCBkBkHzu6WwJW8rZbfxX+YwJmNljN62cPhmdBo8x0A==",
"dev": true,
"dependencies": {
- "@commitlint/is-ignored": "^14.0.0",
- "@commitlint/parse": "^14.0.0",
- "@commitlint/rules": "^14.1.0",
- "@commitlint/types": "^14.0.0"
+ "@commitlint/is-ignored": "^16.0.0",
+ "@commitlint/parse": "^16.0.0",
+ "@commitlint/rules": "^16.0.0",
+ "@commitlint/types": "^16.0.0"
},
"engines": {
"node": ">=v12"
}
},
"node_modules/@commitlint/load": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/load/-/load-14.1.0.tgz",
- "integrity": "sha512-p+HbgjhkqLsnxyjOUdEYHztHCp8n2oLVUJTmRPuP5FXLNevh6Gwmxf+NYC2J0sgD084aV2CFi3qu1W4yHWIknA==",
+ "version": "16.1.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/load/-/load-16.1.0.tgz",
+ "integrity": "sha512-MtlEhKjP8jAF85jjX4mw8DUUwCxKsCgAc865hhpnwxjrfBcmGP7Up2AFE/M3ZMGDmSl1X1TMybQk/zohj8Cqdg==",
"dev": true,
"dependencies": {
- "@commitlint/execute-rule": "^14.0.0",
- "@commitlint/resolve-extends": "^14.1.0",
- "@commitlint/types": "^14.0.0",
- "@endemolshinegroup/cosmiconfig-typescript-loader": "^3.0.2",
+ "@commitlint/config-validator": "^16.1.0",
+ "@commitlint/execute-rule": "^16.0.0",
+ "@commitlint/resolve-extends": "^16.1.0",
+ "@commitlint/types": "^16.0.0",
"chalk": "^4.0.0",
"cosmiconfig": "^7.0.0",
+ "cosmiconfig-typescript-loader": "^1.0.0",
"lodash": "^4.17.19",
"resolve-from": "^5.0.0",
"typescript": "^4.4.3"
@@ -226,21 +265,21 @@
}
},
"node_modules/@commitlint/message": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/message/-/message-14.0.0.tgz",
- "integrity": "sha512-316Pum+bwDcZamOQw0DXSY17Dq9EjvL1zKdYIZqneu4lnXN6uFfi53Y/sP5crW6zlLdnuTHe1MnuewXPLHfH1Q==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/message/-/message-16.0.0.tgz",
+ "integrity": "sha512-CmK2074SH1Ws6kFMEKOKH/7hMekGVbOD6vb4alCOo2+33ZSLUIX8iNkDYyrw38Jwg6yWUhLjyQLUxREeV+QIUA==",
"dev": true,
"engines": {
"node": ">=v12"
}
},
"node_modules/@commitlint/parse": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/parse/-/parse-14.0.0.tgz",
- "integrity": "sha512-49qkk0TcwdxJPZUX8MElEzMlRFIL/cg64P4pk8HotFEm2HYdbxxZp6v3cbVw5WOsnRA0frrs+NNoOcIT83ccMQ==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/parse/-/parse-16.0.0.tgz",
+ "integrity": "sha512-F9EjFlMw4MYgBEqoRrWZZKQBzdiJzPBI0qFDFqwUvfQsMmXEREZ242T4R5bFwLINWaALFLHEIa/FXEPa6QxCag==",
"dev": true,
"dependencies": {
- "@commitlint/types": "^14.0.0",
+ "@commitlint/types": "^16.0.0",
"conventional-changelog-angular": "^5.0.11",
"conventional-commits-parser": "^3.2.2"
},
@@ -249,13 +288,13 @@
}
},
"node_modules/@commitlint/read": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/read/-/read-14.0.0.tgz",
- "integrity": "sha512-WXXcSLBqwXTqnEmB0lbU2TrayDJ2G3qI/lxy1ianVmpQol8p9BjodAA6bYxtYYHdQFVXUrIsclzFP/naWG+hlQ==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/read/-/read-16.0.0.tgz",
+ "integrity": "sha512-H4T2zsfmYQK9B+JtoQaCXWBHUhgIJyOzWZjSfuIV9Ce69/OgHoffNpLZPF2lX6yKuDrS1SQFhI/kUCjVc/e4ew==",
"dev": true,
"dependencies": {
- "@commitlint/top-level": "^14.0.0",
- "@commitlint/types": "^14.0.0",
+ "@commitlint/top-level": "^16.0.0",
+ "@commitlint/types": "^16.0.0",
"fs-extra": "^10.0.0",
"git-raw-commits": "^2.0.0"
},
@@ -264,11 +303,13 @@
}
},
"node_modules/@commitlint/resolve-extends": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/resolve-extends/-/resolve-extends-14.1.0.tgz",
- "integrity": "sha512-ko80k6QB6E6/OvGNWy4u7gzzWyluDT3VDNL2kfZaDywsnrYntUKyT4Do97gQ7orttITzj2GRtk3KWClVz4rUUQ==",
+ "version": "16.1.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/resolve-extends/-/resolve-extends-16.1.0.tgz",
+ "integrity": "sha512-8182s6AFoUFX6+FT1PgQDt15nO2ogdR/EN8SYVAdhNXw1rLz8kT5saB/ICw567GuRAUgFTUMGCXy3ctMOXPEDg==",
"dev": true,
"dependencies": {
+ "@commitlint/config-validator": "^16.1.0",
+ "@commitlint/types": "^16.0.0",
"import-fresh": "^3.0.0",
"lodash": "^4.17.19",
"resolve-from": "^5.0.0",
@@ -279,15 +320,15 @@
}
},
"node_modules/@commitlint/rules": {
- "version": "14.1.0",
- "resolved": "https://registry.npmjs.org/@commitlint/rules/-/rules-14.1.0.tgz",
- "integrity": "sha512-6jmv414/1JzGzDI/DS+snAMhcL6roQKPdg0WB3kWTWN52EvWXBFm0HIMGt2H/FlRKxozwVXlQN60/1fNIl98xA==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/rules/-/rules-16.0.0.tgz",
+ "integrity": "sha512-AOl0y2SBTdJ1bvIv8nwHvQKRT/jC1xb09C5VZwzHoT8sE8F54KDeEzPCwHQFgUcWdGLyS10kkOTAH2MyA8EIlg==",
"dev": true,
"dependencies": {
- "@commitlint/ensure": "^14.1.0",
- "@commitlint/message": "^14.0.0",
- "@commitlint/to-lines": "^14.0.0",
- "@commitlint/types": "^14.0.0",
+ "@commitlint/ensure": "^16.0.0",
+ "@commitlint/message": "^16.0.0",
+ "@commitlint/to-lines": "^16.0.0",
+ "@commitlint/types": "^16.0.0",
"execa": "^5.0.0"
},
"engines": {
@@ -295,18 +336,18 @@
}
},
"node_modules/@commitlint/to-lines": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/to-lines/-/to-lines-14.0.0.tgz",
- "integrity": "sha512-uIXk54oJDuYyLpI208s3+cGmJ323yvSJ9LB7yUDMWUeJi2LgRxE2EBZL995kLQdnoAsBBXcLq+VDyppg5bV/cg==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/to-lines/-/to-lines-16.0.0.tgz",
+ "integrity": "sha512-iN/qU38TCKU7uKOg6RXLpD49wNiuI0TqMqybHbjefUeP/Jmzxa8ishryj0uLyVdrAl1ZjGeD1ukXGMTtvqz8iA==",
"dev": true,
"engines": {
"node": ">=v12"
}
},
"node_modules/@commitlint/top-level": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/top-level/-/top-level-14.0.0.tgz",
- "integrity": "sha512-MZDKZfWfl9g4KozgWBGTCrI2cXkMHnBFlhwvEfrAu5G8wd5aL1f2uWEUMnBMjUikmhVj99i1pzge4XFWHQ29wQ==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/top-level/-/top-level-16.0.0.tgz",
+ "integrity": "sha512-/Jt6NLxyFkpjL5O0jxurZPCHURZAm7cQCqikgPCwqPAH0TLgwqdHjnYipl8J+AGnAMGDip4FNLoYrtgIpZGBYw==",
"dev": true,
"dependencies": {
"find-up": "^5.0.0"
@@ -316,9 +357,9 @@
}
},
"node_modules/@commitlint/types": {
- "version": "14.0.0",
- "resolved": "https://registry.npmjs.org/@commitlint/types/-/types-14.0.0.tgz",
- "integrity": "sha512-sIls1nP2uSbGL466edYlh8mn7O/WP4i3bcvP+2DMhkscRCSgaPhNRWDilhYVsHt2Vu1HTQ27uT0Bj5/Lt2+EcQ==",
+ "version": "16.0.0",
+ "resolved": "https://registry.npmjs.org/@commitlint/types/-/types-16.0.0.tgz",
+ "integrity": "sha512-+0FvYOAS39bJ4aKjnYn/7FD4DfWkmQ6G/06I4F0Gvu4KS5twirEg8mIcLhmeRDOOKn4Tp8PwpLwBiSA6npEMQA==",
"dev": true,
"dependencies": {
"chalk": "^4.0.0"
@@ -327,30 +368,27 @@
"node": ">=v12"
}
},
- "node_modules/@endemolshinegroup/cosmiconfig-typescript-loader": {
- "version": "3.0.2",
- "resolved": "https://registry.npmjs.org/@endemolshinegroup/cosmiconfig-typescript-loader/-/cosmiconfig-typescript-loader-3.0.2.tgz",
- "integrity": "sha512-QRVtqJuS1mcT56oHpVegkKBlgtWjXw/gHNWO3eL9oyB5Sc7HBoc2OLG/nYpVfT/Jejvo3NUrD0Udk7XgoyDKkA==",
+ "node_modules/@cspotcode/source-map-consumer": {
+ "version": "0.8.0",
+ "resolved": "https://registry.npmjs.org/@cspotcode/source-map-consumer/-/source-map-consumer-0.8.0.tgz",
+ "integrity": "sha512-41qniHzTU8yAGbCp04ohlmSrZf8bkf/iJsl3V0dRGsQN/5GFfx+LbCSsCpp2gqrqjTVg/K6O8ycoV35JIwAzAg==",
+ "dev": true,
+ "engines": {
+ "node": ">= 12"
+ }
+ },
+ "node_modules/@cspotcode/source-map-support": {
+ "version": "0.7.0",
+ "resolved": "https://registry.npmjs.org/@cspotcode/source-map-support/-/source-map-support-0.7.0.tgz",
+ "integrity": "sha512-X4xqRHqN8ACt2aHVe51OxeA2HjbcL4MqFqXkrmQszJ1NOUuUu5u6Vqx/0lZSVNku7velL5FC/s5uEAj1lsBMhA==",
"dev": true,
"dependencies": {
- "lodash.get": "^4",
- "make-error": "^1",
- "ts-node": "^9",
- "tslib": "^2"
+ "@cspotcode/source-map-consumer": "0.8.0"
},
"engines": {
- "node": ">=10.0.0"
- },
- "peerDependencies": {
- "cosmiconfig": ">=6"
+ "node": ">=12"
}
},
- "node_modules/@endemolshinegroup/cosmiconfig-typescript-loader/node_modules/tslib": {
- "version": "2.3.1",
- "resolved": "https://registry.npmjs.org/tslib/-/tslib-2.3.1.tgz",
- "integrity": "sha512-77EbyPPpMz+FRFRuAFlWMtmgUWGe9UOG2Z25NqCwiIjRhOf5iKGuzSe5P2w1laq+FkRy4p+PCuVkJSGkzTEKVw==",
- "dev": true
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"node_modules/@hutson/parse-repository-url": {
"version": "3.0.2",
"resolved": "https://registry.npmjs.org/@hutson/parse-repository-url/-/parse-repository-url-3.0.2.tgz",
@@ -360,12 +398,43 @@
"node": ">=6.9.0"
}
},
+ "node_modules/@tsconfig/node10": {
+ "version": "1.0.8",
+ "resolved": "https://registry.npmjs.org/@tsconfig/node10/-/node10-1.0.8.tgz",
+ "integrity": "sha512-6XFfSQmMgq0CFLY1MslA/CPUfhIL919M1rMsa5lP2P097N2Wd1sSX0tx1u4olM16fLNhtHZpRhedZJphNJqmZg==",
+ "dev": true
+ },
+ "node_modules/@tsconfig/node12": {
+ "version": "1.0.9",
+ "resolved": "https://registry.npmjs.org/@tsconfig/node12/-/node12-1.0.9.tgz",
+ "integrity": "sha512-/yBMcem+fbvhSREH+s14YJi18sp7J9jpuhYByADT2rypfajMZZN4WQ6zBGgBKp53NKmqI36wFYDb3yaMPurITw==",
+ "dev": true
+ },
+ "node_modules/@tsconfig/node14": {
+ "version": "1.0.1",
+ "resolved": "https://registry.npmjs.org/@tsconfig/node14/-/node14-1.0.1.tgz",
+ "integrity": "sha512-509r2+yARFfHHE7T6Puu2jjkoycftovhXRqW328PDXTVGKihlb1P8Z9mMZH04ebyajfRY7dedfGynlrFHJUQCg==",
+ "dev": true
+ },
+ "node_modules/@tsconfig/node16": {
+ "version": "1.0.2",
+ "resolved": "https://registry.npmjs.org/@tsconfig/node16/-/node16-1.0.2.tgz",
+ "integrity": "sha512-eZxlbI8GZscaGS7kkc/trHTT5xgrjH3/1n2JDwusC9iahPKWMRvRjJSAN5mCXviuTGQ/lHnhvv8Q1YTpnfz9gA==",
+ "dev": true
+ },
"node_modules/@types/minimist": {
"version": "1.2.2",
"resolved": "https://registry.npmjs.org/@types/minimist/-/minimist-1.2.2.tgz",
"integrity": "sha512-jhuKLIRrhvCPLqwPcx6INqmKeiA5EWrsCOPhrlFSrbrmU4ZMPjj5Ul/oLCMDO98XRUIwVm78xICz4EPCektzeQ==",
"dev": true
},
+ "node_modules/@types/node": {
+ "version": "17.0.10",
+ "resolved": "https://registry.npmjs.org/@types/node/-/node-17.0.10.tgz",
+ "integrity": "sha512-S/3xB4KzyFxYGCppyDt68yzBU9ysL88lSdIah4D6cptdcltc4NCPCAMc0+PCpg/lLIyC7IPvj2Z52OJWeIUkog==",
+ "dev": true,
+ "peer": true
+ },
"node_modules/@types/normalize-package-data": {
"version": "2.4.1",
"resolved": "https://registry.npmjs.org/@types/normalize-package-data/-/normalize-package-data-2.4.1.tgz",
@@ -378,19 +447,76 @@
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"dev": true
},
+ "node_modules/acorn": {
+ "version": "8.7.0",
+ "resolved": "https://registry.npmjs.org/acorn/-/acorn-8.7.0.tgz",
+ "integrity": "sha512-V/LGr1APy+PXIwKebEWrkZPwoeoF+w1jiOBUmuxuiUIaOHtob8Qc9BTrYo7VuI5fR8tqsy+buA2WFooR5olqvQ==",
+ "dev": true,
+ "bin": {
+ "acorn": "bin/acorn"
+ },
+ "engines": {
+ "node": ">=0.4.0"
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@@ -5982,12 +6496,30 @@
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+ "resolved": "https://registry.npmjs.org/ora/-/ora-5.4.1.tgz",
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+ "cli-cursor": "^3.1.0",
+ "cli-spinners": "^2.5.0",
+ "is-interactive": "^1.0.0",
+ "is-unicode-supported": "^0.1.0",
+ "log-symbols": "^4.1.0",
+ "strip-ansi": "^6.0.0",
+ "wcwidth": "^1.0.1"
}
},
"os-tmpdir": {
@@ -6095,6 +6627,12 @@
"integrity": "sha512-3ouUOpQhtgrbOa17J7+uxOTpITYWaGP7/AhoR3+A+/1e9skrzelGi/dXzEYyvbxubEF6Wn2ypscTKiKJFFn1ag==",
"dev": true
},
+ "punycode": {
+ "version": "2.1.1",
+ "resolved": "https://registry.npmjs.org/punycode/-/punycode-2.1.1.tgz",
+ "integrity": "sha512-XRsRjdf+j5ml+y/6GKHPZbrF/8p2Yga0JPtdqTIY2Xe5ohJPD9saDJJLPvp9+NSBprVvevdXZybnj2cv8OEd0A==",
+ "dev": true
+ },
"q": {
"version": "1.5.1",
"resolved": "https://registry.npmjs.org/q/-/q-1.5.1.tgz",
@@ -6270,12 +6808,13 @@
}
},
"restore-cursor": {
- "version": "2.0.0",
- "resolved": "https://registry.npmjs.org/restore-cursor/-/restore-cursor-2.0.0.tgz",
- "integrity": "sha1-n37ih/gv0ybU/RYpI9YhKe7g368=",
+ "version": "3.1.0",
+ "resolved": "https://registry.npmjs.org/restore-cursor/-/restore-cursor-3.1.0.tgz",
+ "integrity": "sha512-l+sSefzHpj5qimhFSE5a8nufZYAM3sBSVMAPtYkmC+4EH2anSGaEMXSD0izRQbu9nfyQ9y5JrVmp7E8oZrUjvA==",
"dev": true,
+ "peer": true,
"requires": {
- "onetime": "^2.0.0",
+ "onetime": "^5.1.0",
"signal-exit": "^3.0.2"
}
},
@@ -6286,12 +6825,13 @@
"dev": true
},
"rxjs": {
- "version": "6.6.7",
- "resolved": "https://registry.npmjs.org/rxjs/-/rxjs-6.6.7.tgz",
- "integrity": "sha512-hTdwr+7yYNIT5n4AMYp85KA6yw2Va0FLa3Rguvbpa4W3I5xynaBZo41cM3XM+4Q6fRMj3sBYIR1VAmZMXYJvRQ==",
+ "version": "7.4.0",
+ "resolved": "https://registry.npmjs.org/rxjs/-/rxjs-7.4.0.tgz",
+ "integrity": "sha512-7SQDi7xeTMCJpqViXh8gL/lebcwlp3d831F05+9B44A4B0WfsEwUQHR64gsH1kvJ+Ep/J9K2+n1hVl1CsGN23w==",
"dev": true,
+ "peer": true,
"requires": {
- "tslib": "^1.9.0"
+ "tslib": "~2.1.0"
}
},
"safe-buffer": {
@@ -6342,16 +6882,6 @@
"integrity": "sha512-UjgapumWlbMhkBgzT7Ykc5YXUT46F0iKu8SGXq0bcwP5dz/h0Plj6enJqjz1Zbq2l5WaqYnrVbwWOWMyF3F47g==",
"dev": true
},
- "source-map-support": {
- "version": "0.5.20",
- "resolved": "https://registry.npmjs.org/source-map-support/-/source-map-support-0.5.20.tgz",
- "integrity": "sha512-n1lZZ8Ve4ksRqizaBQgxXDgKwttHDhyfQjA6YZZn8+AroHbsIz+JjwxQDxbp+7y5OYCI8t1Yk7etjD9CRd2hIw==",
- "dev": true,
- "requires": {
- "buffer-from": "^1.0.0",
- "source-map": "^0.6.0"
- }
- },
"spdx-correct": {
"version": "3.1.1",
"resolved": "https://registry.npmjs.org/spdx-correct/-/spdx-correct-3.1.1.tgz",
@@ -6460,15 +6990,6 @@
"integrity": "sha1-p9BVi9icQveV3UIyj3QIMcpTvCU=",
"dev": true
},
- "figures": {
- "version": "3.2.0",
- "resolved": "https://registry.npmjs.org/figures/-/figures-3.2.0.tgz",
- "integrity": "sha512-yaduQFRKLXYOGgEn6AZau90j3ggSOyiqXU0F9JZfeXYhNa+Jk4X+s45A2zg5jns87GAFa34BBm2kXw4XpNcbdg==",
- "dev": true,
- "requires": {
- "escape-string-regexp": "^1.0.5"
- }
- },
"has-flag": {
"version": "3.0.0",
"resolved": "https://registry.npmjs.org/has-flag/-/has-flag-3.0.0.tgz",
@@ -6618,24 +7139,31 @@
"dev": true
},
"ts-node": {
- "version": "9.1.1",
- "resolved": "https://registry.npmjs.org/ts-node/-/ts-node-9.1.1.tgz",
- "integrity": "sha512-hPlt7ZACERQGf03M253ytLY3dHbGNGrAq9qIHWUY9XHYl1z7wYngSr3OQ5xmui8o2AaxsONxIzjafLUiWBo1Fg==",
+ "version": "10.4.0",
+ "resolved": "https://registry.npmjs.org/ts-node/-/ts-node-10.4.0.tgz",
+ "integrity": "sha512-g0FlPvvCXSIO1JDF6S232P5jPYqBkRL9qly81ZgAOSU7rwI0stphCgd2kLiCrU9DjQCrJMWEqcNSjQL02s6d8A==",
"dev": true,
"requires": {
+ "@cspotcode/source-map-support": "0.7.0",
+ "@tsconfig/node10": "^1.0.7",
+ "@tsconfig/node12": "^1.0.7",
+ "@tsconfig/node14": "^1.0.0",
+ "@tsconfig/node16": "^1.0.2",
+ "acorn": "^8.4.1",
+ "acorn-walk": "^8.1.1",
"arg": "^4.1.0",
"create-require": "^1.1.0",
"diff": "^4.0.1",
"make-error": "^1.1.1",
- "source-map-support": "^0.5.17",
"yn": "3.1.1"
}
},
"tslib": {
- "version": "1.14.1",
- "resolved": "https://registry.npmjs.org/tslib/-/tslib-1.14.1.tgz",
- "integrity": "sha512-Xni35NKzjgMrwevysHTCArtLDpPvye8zV/0E4EyYn43P7/7qvQwPh9BGkHewbMulVntbigmcT7rdX3BNo9wRJg==",
- "dev": true
+ "version": "2.1.0",
+ "resolved": "https://registry.npmjs.org/tslib/-/tslib-2.1.0.tgz",
+ "integrity": "sha512-hcVC3wYEziELGGmEEXue7D75zbwIIVUMWAVbHItGPx0ziyXxrOMQx4rQEVEV45Ut/1IotuEvwqPopzIOkDMf0A==",
+ "dev": true,
+ "peer": true
},
"type-fest": {
"version": "0.18.1",
@@ -6650,9 +7178,9 @@
"dev": true
},
"typescript": {
- "version": "4.4.4",
- "resolved": "https://registry.npmjs.org/typescript/-/typescript-4.4.4.tgz",
- "integrity": "sha512-DqGhF5IKoBl8WNf8C1gu8q0xZSInh9j1kJJMqT3a94w1JzVaBU4EXOSMrz9yDqMT0xt3selp83fuFMQ0uzv6qA==",
+ "version": "4.5.5",
+ "resolved": "https://registry.npmjs.org/typescript/-/typescript-4.5.5.tgz",
+ "integrity": "sha512-TCTIul70LyWe6IJWT8QSYeA54WQe8EjQFU4wY52Fasj5UKx88LNYKCgBEHcOMOrFF1rKGbD8v/xcNWVUq9SymA==",
"dev": true
},
"uglify-js": {
@@ -6668,6 +7196,15 @@
"integrity": "sha512-hAZsKq7Yy11Zu1DE0OzWjw7nnLZmJZYTDZZyEFHZdUhV8FkH5MCfoU1XMaxXovpyW5nq5scPqq0ZDP9Zyl04oQ==",
"dev": true
},
+ "uri-js": {
+ "version": "4.4.1",
+ "resolved": "https://registry.npmjs.org/uri-js/-/uri-js-4.4.1.tgz",
+ "integrity": "sha512-7rKUyy33Q1yc98pQ1DAmLtwX109F7TIfWlW1Ydo8Wl1ii1SeHieeh0HHfPeL2fMXK6z0s8ecKs9frCuLJvndBg==",
+ "dev": true,
+ "requires": {
+ "punycode": "^2.1.0"
+ }
+ },
"util-deprecate": {
"version": "1.0.2",
"resolved": "https://registry.npmjs.org/util-deprecate/-/util-deprecate-1.0.2.tgz",
@@ -6684,6 +7221,16 @@
"spdx-expression-parse": "^3.0.0"
}
},
+ "wcwidth": {
+ "version": "1.0.1",
+ "resolved": "https://registry.npmjs.org/wcwidth/-/wcwidth-1.0.1.tgz",
+ "integrity": "sha1-8LDc+RW8X/FSivrbLA4XtTLaL+g=",
+ "dev": true,
+ "peer": true,
+ "requires": {
+ "defaults": "^1.0.3"
+ }
+ },
"which": {
"version": "1.3.1",
"resolved": "https://registry.npmjs.org/which/-/which-1.3.1.tgz",
diff --git a/package.json b/package.json
index 50053c6..e5cd924 100644
--- a/package.json
+++ b/package.json
@@ -1,19 +1,23 @@
{
"name": "trusted-firmware-a",
- "version": "2.5.0",
+ "version": "2.6.0",
"license": "BSD-3-Clause",
"private": true,
"scripts": {
"postinstall": "husky install",
- "release": "standard-version -i docs/change-log.md"
+ "release": "standard-version"
+ },
+ "engines": {
+ "node": ">=16.0.0"
},
"devDependencies": {
- "@commitlint/cli": "^14.1.0",
- "@commitlint/config-conventional": "^14.1.0",
+ "@commitlint/cli": "^16.1.0",
+ "@commitlint/config-conventional": "^16.0.0",
+ "@commitlint/cz-commitlint": "^16.1.0",
"commitizen": "^4.2.4",
"conventional-changelog-tf-a": "file:tools/conventional-changelog-tf-a",
- "cz-conventional-changelog": "^3.3.0",
"husky": "^7.0.4",
+ "js-yaml": "^4.1.0",
"standard-version": "^9.3.2"
}
}
diff --git a/plat/arm/board/fvp/fvp_bl2_measured_boot.c b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
index 4943e58..af43065 100644
--- a/plat/arm/board/fvp/fvp_bl2_measured_boot.c
+++ b/plat/arm/board/fvp/fvp_bl2_measured_boot.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -87,6 +87,7 @@
return 0;
}
+#if TRUSTED_BOARD_BOOT
static int fvp_populate_critical_data(struct fvp_critical_data *critical_data)
{
char *nv_ctr_oids[MAX_NV_CTR_IDS] = {
@@ -104,17 +105,26 @@
return 0;
}
+#endif /* TRUSTED_BOARD_BOOT */
static int fvp_populate_and_measure_critical_data(void)
{
+ int rc = 0;
+
+/*
+ * FVP platform only measures 'platform NV-counter' and hence its
+ * measurement makes sense during Trusted-Boot flow only.
+ */
+#if TRUSTED_BOARD_BOOT
struct fvp_critical_data populate_critical_data;
- int rc = fvp_populate_critical_data(&populate_critical_data);
+ rc = fvp_populate_critical_data(&populate_critical_data);
if (rc == 0) {
rc = plat_mboot_measure_critical_data(CRITICAL_DATA_ID,
&populate_critical_data,
sizeof(populate_critical_data));
}
+#endif /* TRUSTED_BOARD_BOOT */
return rc;
}
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index e7a28ac..d8d19de 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -117,10 +117,15 @@
#if TRUSTED_BOARD_BOOT
/* To access the Root of Trust Public Key registers. */
MAP_DEVICE2,
-#if !BL2_AT_EL3
- ARM_MAP_BL1_RW,
-#endif
#endif /* TRUSTED_BOARD_BOOT */
+
+#if CRYPTO_SUPPORT && !BL2_AT_EL3
+ /*
+ * To access shared the Mbed TLS heap while booting the
+ * system with Crypto support
+ */
+ ARM_MAP_BL1_RW,
+#endif /* CRYPTO_SUPPORT && !BL2_AT_EL3 */
#if SPM_MM
ARM_SP_IMAGE_MMAP,
#endif
@@ -444,7 +449,7 @@
#endif
}
-#if TRUSTED_BOARD_BOOT
+#if CRYPTO_SUPPORT
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
{
assert(heap_addr != NULL);
@@ -452,7 +457,7 @@
return arm_get_mbedtls_heap(heap_addr, heap_size);
}
-#endif
+#endif /* CRYPTO_SUPPORT */
void fvp_timer_init(void)
{
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index d89e122..fcc4a0a 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -144,12 +144,10 @@
* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
* little space for growth.
*/
-#if TRUSTED_BOARD_BOOT
-#if COT_DESC_IN_DTB
+#if TRUSTED_BOARD_BOOT && COT_DESC_IN_DTB
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1E000) - FVP_BL2_ROMLIB_OPTIMIZATION)
-#else
+#elif CRYPTO_SUPPORT
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - FVP_BL2_ROMLIB_OPTIMIZATION)
-#endif
#else
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x13000) - FVP_BL2_ROMLIB_OPTIMIZATION)
#endif
@@ -187,17 +185,17 @@
* Size of cacheable stacks
*/
#if defined(IMAGE_BL1)
-# if TRUSTED_BOARD_BOOT
+# if CRYPTO_SUPPORT
# define PLATFORM_STACK_SIZE UL(0x1000)
# else
# define PLATFORM_STACK_SIZE UL(0x500)
-# endif
+# endif /* CRYPTO_SUPPORT */
#elif defined(IMAGE_BL2)
-# if TRUSTED_BOARD_BOOT
+# if CRYPTO_SUPPORT
# define PLATFORM_STACK_SIZE UL(0x1000)
# else
# define PLATFORM_STACK_SIZE UL(0x600)
-# endif
+# endif /* CRYPTO_SUPPORT */
#elif defined(IMAGE_BL2U)
# define PLATFORM_STACK_SIZE UL(0x400)
#elif defined(IMAGE_BL31)
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index b7f9c61..a24a2e5 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -143,7 +143,8 @@
lib/cpus/aarch64/cortex_a78c.S \
lib/cpus/aarch64/cortex_hayes.S \
lib/cpus/aarch64/cortex_hunter.S \
- lib/cpus/aarch64/cortex_x2.S
+ lib/cpus/aarch64/cortex_x2.S \
+ lib/cpus/aarch64/neoverse_poseidon.S
endif
# AArch64/AArch32 cores
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
@@ -376,10 +377,6 @@
include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk
-ifeq (${TRUSTED_BOARD_BOOT}, 1)
-BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
-BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
-
ifeq (${MEASURED_BOOT},1)
BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
plat/arm/board/fvp/fvp_bl1_measured_boot.c
@@ -387,6 +384,10 @@
plat/arm/board/fvp/fvp_bl2_measured_boot.c
endif
+ifeq (${TRUSTED_BOARD_BOOT}, 1)
+BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
+BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
+
# FVP being a development platform, enable capability to disable Authentication
# dynamically if TRUSTED_BOARD_BOOT is set.
DYN_DISABLE_AUTH := 1
diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 320bb82..73338cb 100644
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -202,10 +202,10 @@
assert(desc != NULL);
desc->ep_info.args.arg0 = fw_config_info->config_addr;
-#if TRUSTED_BOARD_BOOT
+#if CRYPTO_SUPPORT
/* Share the Mbed TLS heap info with other images */
arm_bl1_set_mbedtls_heap();
-#endif /* TRUSTED_BOARD_BOOT */
+#endif /* CRYPTO_SUPPORT */
/*
* Allow access to the System counter timer module and program
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 064ed57..711ed03 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -358,10 +358,8 @@
ifneq (${TRUSTED_BOARD_BOOT},0)
# Include common TBB sources
- AUTH_SOURCES := drivers/auth/auth_mod.c \
- drivers/auth/crypto_mod.c \
- drivers/auth/img_parser_mod.c \
- lib/fconf/fconf_tbbr_getter.c
+ AUTH_SOURCES := drivers/auth/auth_mod.c \
+ drivers/auth/img_parser_mod.c
# Include the selected chain of trust sources.
ifeq (${COT},tbbr)
@@ -389,6 +387,12 @@
$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
+ IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
+
+ $(info Including ${IMG_PARSER_LIB_MK})
+ include ${IMG_PARSER_LIB_MK}
+endif
+
# Include Measured Boot makefile before any Crypto library makefile.
# Crypto library makefile may need default definitions of Measured Boot build
# flags present in Measured Boot makefile.
@@ -398,20 +402,21 @@
include ${MEASURED_BOOT_MK}
endif
+ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT}),)
+ CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
+ lib/fconf/fconf_tbbr_getter.c
+ BL1_SOURCES += ${CRYPTO_SOURCES}
+ BL2_SOURCES += ${CRYPTO_SOURCES}
+
# We expect to locate the *.mk files under the directories specified below
-ifeq (${ARM_CRYPTOCELL_INTEG},0)
- CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
-else
- CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
-endif
- IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
+ ifeq (${ARM_CRYPTOCELL_INTEG},0)
+ CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
+ else
+ CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
+ endif
$(info Including ${CRYPTO_LIB_MK})
include ${CRYPTO_LIB_MK}
-
- $(info Including ${IMG_PARSER_LIB_MK})
- include ${IMG_PARSER_LIB_MK}
-
endif
ifeq (${RECLAIM_INIT_CODE}, 1)
@@ -419,4 +424,3 @@
$(error "To reclaim init code xlat tables v2 must be used")
endif
endif
-
diff --git a/plat/arm/common/arm_dyn_cfg.c b/plat/arm/common/arm_dyn_cfg.c
index 6aae9ae..7abd1cd 100644
--- a/plat/arm/common/arm_dyn_cfg.c
+++ b/plat/arm/common/arm_dyn_cfg.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,9 +13,9 @@
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <common/tbbr/tbbr_img_def.h>
-#if TRUSTED_BOARD_BOOT
+#if CRYPTO_SUPPORT
#include <drivers/auth/mbedtls/mbedtls_config.h>
-#endif
+#endif /* CRYPTO_SUPPORT */
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <lib/fconf/fconf_tbbr_getter.h>
@@ -23,7 +23,7 @@
#include <plat/arm/common/arm_dyn_cfg_helpers.h>
#include <plat/arm/common/plat_arm.h>
-#if TRUSTED_BOARD_BOOT
+#if CRYPTO_SUPPORT
static void *mbedtls_heap_addr;
static size_t mbedtls_heap_size;
@@ -118,7 +118,7 @@
#endif /* !MEASURED_BOOT */
}
}
-#endif /* TRUSTED_BOARD_BOOT */
+#endif /* CRYPTO_SUPPORT */
/*
* BL2 utility function to initialize dynamic configuration specified by
diff --git a/plat/arm/common/arm_io_storage.c b/plat/arm/common/arm_io_storage.c
index 387086a..19ee1b0 100644
--- a/plat/arm/common/arm_io_storage.c
+++ b/plat/arm/common/arm_io_storage.c
@@ -217,7 +217,7 @@
* bank to get its offset and length, and update these details in the I/O policy
* of the FIP image.
******************************************************************************/
-void plat_fwu_set_images_source(struct fwu_metadata *metadata)
+void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
{
arm_set_fip_addr(metadata->active_index);
}
diff --git a/plat/nxp/soc-ls1028a/soc.c b/plat/nxp/soc-ls1028a/soc.c
index edfd657..2fb353f 100644
--- a/plat/nxp/soc-ls1028a/soc.c
+++ b/plat/nxp/soc-ls1028a/soc.c
@@ -23,9 +23,6 @@
#include <nxp_smmu.h>
#endif
#include <nxp_timer.h>
-#ifdef CONFIG_OCRAM_ECC_EN
-#include <ocram.h>
-#endif
#include <plat_console.h>
#include <plat_gic.h>
#include <plat_tzc400.h>
@@ -36,6 +33,9 @@
#endif
#include <errata.h>
+#ifdef CONFIG_OCRAM_ECC_EN
+#include <ocram.h>
+#endif
#include "plat_common.h"
#include "platform_def.h"
#include "soc.h"
diff --git a/plat/renesas/common/common.mk b/plat/renesas/common/common.mk
index 0d88d65..aef0ad1 100644
--- a/plat/renesas/common/common.mk
+++ b/plat/renesas/common/common.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved.
+# Copyright (c) 2018-2022, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -17,6 +17,11 @@
CRASH_REPORTING := 1
HANDLE_EA_EL3_FIRST := 1
+# This option gets enabled automatically if the TRUSTED_BOARD_BOOT
+# is set via root Makefile, but Renesas support Trusted-Boot without
+# Crypto module.
+override CRYPTO_SUPPORT := 0
+
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
ifeq (${SPD},none)
diff --git a/plat/st/common/bl2_io_storage.c b/plat/st/common/bl2_io_storage.c
index 6069e5f..e129dfd 100644
--- a/plat/st/common/bl2_io_storage.c
+++ b/plat/st/common/bl2_io_storage.c
@@ -10,6 +10,8 @@
#include <arch_helpers.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
+#include <drivers/fwu/fwu.h>
+#include <drivers/fwu/fwu_metadata.h>
#include <drivers/io/io_block.h>
#include <drivers/io/io_driver.h>
#include <drivers/io/io_fip.h>
@@ -17,6 +19,7 @@
#include <drivers/io/io_mtd.h>
#include <drivers/io/io_storage.h>
#include <drivers/mmc.h>
+#include <drivers/partition/efi.h>
#include <drivers/partition/partition.h>
#include <drivers/raw_nand.h>
#include <drivers/spi_nand.h>
@@ -384,6 +387,12 @@
case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
if (!gpt_init_done) {
+/*
+ * With FWU Multi Bank feature enabled, the selection of
+ * the image to boot will be done by fwu_init calling the
+ * platform hook, plat_fwu_set_images_source.
+ */
+#if !PSA_FWU_SUPPORT
const partition_entry_t *entry;
partition_init(GPT_IMAGE_ID);
@@ -396,7 +405,7 @@
image_block_spec.offset = entry->start;
image_block_spec.length = entry->length;
-
+#endif
gpt_init_done = true;
} else {
bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
@@ -473,3 +482,117 @@
return rc;
}
+
+#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
+/*
+ * Eventually, this function will return the
+ * boot index to be passed on to the Update
+ * Agent after performing certain checks like
+ * a watchdog timeout, or Auth failure while
+ * trying to load from a certain bank.
+ * For now, since we do not have that logic
+ * implemented, just pass the active_index
+ * read from the metadata.
+ */
+uint32_t plat_fwu_get_boot_idx(void)
+{
+ const struct fwu_metadata *metadata;
+
+ metadata = fwu_get_metadata();
+
+ return metadata->active_index;
+}
+
+static void *stm32_get_image_spec(const uuid_t *img_type_uuid)
+{
+ unsigned int i;
+
+ for (i = 0U; i < MAX_NUMBER_IDS; i++) {
+ if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) {
+ return (void *)policies[i].image_spec;
+ }
+ }
+
+ return NULL;
+}
+
+void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
+{
+ unsigned int i;
+ uint32_t boot_idx;
+ const partition_entry_t *entry;
+ const uuid_t *img_type_uuid, *img_uuid;
+ io_block_spec_t *image_spec;
+
+ boot_idx = plat_fwu_get_boot_idx();
+ assert(boot_idx < NR_OF_FW_BANKS);
+
+ for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
+ img_type_uuid = &metadata->img_entry[i].img_type_uuid;
+ image_spec = stm32_get_image_spec(img_type_uuid);
+ if (image_spec == NULL) {
+ ERROR("Unable to get image spec for the image in the metadata\n");
+ panic();
+ }
+
+ img_uuid =
+ &metadata->img_entry[i].img_props[boot_idx].img_uuid;
+
+ entry = get_partition_entry_by_uuid(img_uuid);
+ if (entry == NULL) {
+ ERROR("Unable to find the partition with the uuid mentioned in metadata\n");
+ panic();
+ }
+
+ image_spec->offset = entry->start;
+ image_spec->length = entry->length;
+ }
+}
+
+static int plat_set_image_source(unsigned int image_id,
+ uintptr_t *handle,
+ uintptr_t *image_spec,
+ const char *part_name)
+{
+ struct plat_io_policy *policy;
+ io_block_spec_t *spec;
+ const partition_entry_t *entry = get_partition_entry(part_name);
+
+ if (entry == NULL) {
+ ERROR("Unable to find the %s partition\n", part_name);
+ return -ENOENT;
+ }
+
+ policy = &policies[image_id];
+
+ spec = (io_block_spec_t *)policy->image_spec;
+ spec->offset = entry->start;
+ spec->length = entry->length;
+
+ *image_spec = policy->image_spec;
+ *handle = *policy->dev_handle;
+
+ return 0;
+}
+
+int plat_fwu_set_metadata_image_source(unsigned int image_id,
+ uintptr_t *handle,
+ uintptr_t *image_spec)
+{
+ char *part_name;
+
+ assert((image_id == FWU_METADATA_IMAGE_ID) ||
+ (image_id == BKUP_FWU_METADATA_IMAGE_ID));
+
+ partition_init(GPT_IMAGE_ID);
+
+ if (image_id == FWU_METADATA_IMAGE_ID) {
+ part_name = METADATA_PART_1;
+ } else {
+ part_name = METADATA_PART_2;
+ }
+
+ return plat_set_image_source(image_id, handle, image_spec,
+ part_name);
+}
+#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h
index 9ca5d16..7508004 100644
--- a/plat/st/common/include/stm32mp_common.h
+++ b/plat/st/common/include/stm32mp_common.h
@@ -113,4 +113,8 @@
void stm32_save_boot_interface(uint32_t interface, uint32_t instance);
void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance);
+#if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT
+void stm32mp1_fwu_set_boot_idx(void);
+#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
+
#endif /* STM32MP_COMMON_H */
diff --git a/plat/st/common/include/stm32mp_efi.h b/plat/st/common/include/stm32mp_efi.h
new file mode 100644
index 0000000..490560f
--- /dev/null
+++ b/plat/st/common/include/stm32mp_efi.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#ifndef STM32MP_EFI_H
+#define STM32MP_EFI_H
+
+#include <drivers/partition/efi.h>
+
+#define STM32MP_FIP_GUID \
+ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, \
+ 0xbe, 0x2c, 0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
+
+#endif /* STM32MP_EFI_H */
diff --git a/plat/st/common/include/stm32mp_fconf_getter.h b/plat/st/common/include/stm32mp_fconf_getter.h
index 3a8bb11..18884ae 100644
--- a/plat/st/common/include/stm32mp_fconf_getter.h
+++ b/plat/st/common/include/stm32mp_fconf_getter.h
@@ -10,6 +10,7 @@
#include <assert.h>
#include <lib/fconf/fconf.h>
+#include <tools_share/uuid.h>
/* IO policies */
#define stm32mp__io_policies_getter(id) __extension__ ({ \
@@ -20,6 +21,7 @@
struct plat_io_policy {
uintptr_t *dev_handle;
uintptr_t image_spec;
+ struct efi_guid img_type_guid;
int (*check)(const uintptr_t spec);
};
diff --git a/plat/st/common/include/stm32mp_shres_helpers.h b/plat/st/common/include/stm32mp_shres_helpers.h
deleted file mode 100644
index 8b786cc..0000000
--- a/plat/st/common/include/stm32mp_shres_helpers.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef STM32MP_SHRES_HELPERS_H
-#define STM32MP_SHRES_HELPERS_H
-
-#include <stdint.h>
-
-#include <common/debug.h>
-
-/*
- * Shared reference counter: increments by 2 on secure increment
- * request, decrements by 2 on secure decrement request. Bit #0
- * is set to 1 on non-secure increment request and reset to 0 on
- * non-secure decrement request. The counter initializes to
- * either 0, 1 or 2 upon their expect default state.
- * Counters saturates once above UINT_MAX / 2.
- */
-#define SHREFCNT_NONSECURE_FLAG 0x1UL
-#define SHREFCNT_SECURE_STEP 0x2UL
-#define SHREFCNT_MAX (UINT32_MAX / 2)
-
-/* Return 1 if refcnt increments from 0, else return 0 */
-static inline int stm32mp_incr_shrefcnt(unsigned int *refcnt, bool secure)
-{
- int rc = !*refcnt;
-
- if (secure) {
- *refcnt += SHREFCNT_SECURE_STEP;
- if (*refcnt >= SHREFCNT_MAX) {
- panic();
- }
- } else {
- *refcnt |= SHREFCNT_NONSECURE_FLAG;
- }
-
- return rc;
-}
-
-/* Return 1 if refcnt decrements to 0, else return 0 */
-static inline int stm32mp_decr_shrefcnt(unsigned int *refcnt, bool secure)
-{
- int rc = 0;
-
- if (secure) {
- if (*refcnt < SHREFCNT_MAX) {
- if (*refcnt < SHREFCNT_SECURE_STEP) {
- panic();
- }
- *refcnt -= SHREFCNT_SECURE_STEP;
- rc = !*refcnt;
- }
- } else {
- rc = (*refcnt == SHREFCNT_NONSECURE_FLAG) ? 1 : 0;
- *refcnt &= ~SHREFCNT_NONSECURE_FLAG;
- }
-
- return rc;
-}
-
-static inline int stm32mp_incr_refcnt(unsigned int *refcnt)
-{
- return stm32mp_incr_shrefcnt(refcnt, true);
-}
-
-static inline int stm32mp_decr_refcnt(unsigned int *refcnt)
-{
- return stm32mp_decr_shrefcnt(refcnt, true);
-}
-
-#endif /* STM32MP_SHRES_HELPERS_H */
diff --git a/plat/st/common/stm32mp_fconf_io.c b/plat/st/common/stm32mp_fconf_io.c
index aa8cd54..ca71958 100644
--- a/plat/st/common/stm32mp_fconf_io.c
+++ b/plat/st/common/stm32mp_fconf_io.c
@@ -16,6 +16,7 @@
#include <tools_share/firmware_image_package.h>
#include <platform_def.h>
+#include <stm32mp_efi.h>
#include <stm32mp_fconf_getter.h>
#include <stm32mp_io_storage.h>
@@ -26,20 +27,43 @@
};
#endif
+#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
+io_block_spec_t metadata_block_spec = {
+ .offset = 0, /* To be filled at runtime */
+ .length = 0, /* To be filled at runtime */
+};
+#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
+
/* By default, STM32 platforms load images from the FIP */
struct plat_io_policy policies[MAX_NUMBER_IDS] = {
[FIP_IMAGE_ID] = {
- &storage_dev_handle,
- (uintptr_t)&image_block_spec,
- open_storage
+ .dev_handle = &storage_dev_handle,
+ .image_spec = (uintptr_t)&image_block_spec,
+ .img_type_guid = STM32MP_FIP_GUID,
+ .check = open_storage
},
#if STM32MP_SDMMC || STM32MP_EMMC
[GPT_IMAGE_ID] = {
- &storage_dev_handle,
- (uintptr_t)&gpt_block_spec,
- open_storage
+ .dev_handle = &storage_dev_handle,
+ .image_spec = (uintptr_t)&gpt_block_spec,
+ .img_type_guid = NULL_GUID,
+ .check = open_storage
},
#endif
+#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
+ [FWU_METADATA_IMAGE_ID] = {
+ .dev_handle = &storage_dev_handle,
+ .image_spec = (uintptr_t)&metadata_block_spec,
+ .img_type_guid = NULL_GUID,
+ .check = open_storage
+ },
+ [BKUP_FWU_METADATA_IMAGE_ID] = {
+ .dev_handle = &storage_dev_handle,
+ .image_spec = (uintptr_t)&metadata_block_spec,
+ .img_type_guid = NULL_GUID,
+ .check = open_storage
+ },
+#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
};
#define FCONF_ST_IO_UUID_NUMBER U(8)
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index 3c6f48a..b5fc3ff 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -30,6 +30,7 @@
#include <plat/common/platform.h>
#include <platform_def.h>
+#include <stm32mp_common.h>
#include <stm32mp1_dbgmcu.h>
static struct stm32mp_auth_ops stm32mp1_auth_ops;
@@ -308,6 +309,8 @@
print_reset_reason();
+ stm32mp1_syscfg_enable_io_compensation_finish();
+
#if !STM32MP_USE_STM32IMAGE
fconf_populate("TB_FW", STM32MP_DTB_BASE);
#endif /* !STM32MP_USE_STM32IMAGE */
@@ -450,6 +453,9 @@
bl32_mem_params = get_bl_mem_params_node(BL32_IMAGE_ID);
assert(bl32_mem_params != NULL);
bl32_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc;
+#if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT
+ stm32mp1_fwu_set_boot_idx();
+#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
break;
default:
diff --git a/plat/st/stm32mp1/include/platform_def.h b/plat/st/stm32mp1/include/platform_def.h
index 511a0e2..8ecb4c3 100644
--- a/plat/st/stm32mp1/include/platform_def.h
+++ b/plat/st/stm32mp1/include/platform_def.h
@@ -40,6 +40,9 @@
#define BL33_BINARY_TYPE U(0x0)
#else /* STM32MP_USE_STM32IMAGE */
#define FIP_IMAGE_NAME "fip"
+#define METADATA_PART_1 "metadata1"
+#define METADATA_PART_2 "metadata2"
+
#endif /* STM32MP_USE_STM32IMAGE */
#define STM32MP_PRIMARY_CPU U(0x0)
diff --git a/plat/st/stm32mp1/include/stm32mp1_private.h b/plat/st/stm32mp1/include/stm32mp1_private.h
index 2eec16f..38de1b7 100644
--- a/plat/st/stm32mp1/include/stm32mp1_private.h
+++ b/plat/st/stm32mp1/include/stm32mp1_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -18,7 +18,8 @@
void stm32mp1_gic_init(void);
void stm32mp1_syscfg_init(void);
-void stm32mp1_syscfg_enable_io_compensation(void);
+void stm32mp1_syscfg_enable_io_compensation_start(void);
+void stm32mp1_syscfg_enable_io_compensation_finish(void);
void stm32mp1_syscfg_disable_io_compensation(void);
void stm32mp1_deconfigure_uart_pins(void);
diff --git a/plat/st/stm32mp1/platform.mk b/plat/st/stm32mp1/platform.mk
index 13dea2a..6f7c79b 100644
--- a/plat/st/stm32mp1/platform.mk
+++ b/plat/st/stm32mp1/platform.mk
@@ -38,8 +38,22 @@
# Not needed for Cortex-A7
WORKAROUND_CVE_2017_5715:= 0
+ifeq (${PSA_FWU_SUPPORT},1)
+ifneq (${STM32MP_USE_STM32IMAGE},1)
+# Number of banks of updatable firmware
+NR_OF_FW_BANKS := 2
+NR_OF_IMAGES_IN_FW_BANK := 1
+
# Number of TF-A copies in the device
STM32_TF_A_COPIES := 2
+STM32_BL33_PARTS_NUM := 2
+STM32_RUNTIME_PARTS_NUM := 4
+else
+$(error FWU Feature enabled only with FIP images)
+endif
+else
+# Number of TF-A copies in the device
+STM32_TF_A_COPIES := 2
STM32_BL33_PARTS_NUM := 1
ifeq ($(AARCH32_SP),optee)
STM32_RUNTIME_PARTS_NUM := 3
@@ -48,6 +62,7 @@
else
STM32_RUNTIME_PARTS_NUM := 1
endif
+endif
PLAT_PARTITION_MAX_ENTRIES := $(shell echo $$(($(STM32_TF_A_COPIES) + \
$(STM32_BL33_PARTS_NUM) + \
$(STM32_RUNTIME_PARTS_NUM))))
@@ -237,6 +252,13 @@
plat/st/stm32mp1/stm32mp1_security.c
endif
+ifeq (${PSA_FWU_SUPPORT},1)
+include lib/zlib/zlib.mk
+include drivers/fwu/fwu.mk
+
+BL2_SOURCES += $(ZLIB_SOURCES)
+endif
+
BL2_SOURCES += drivers/io/io_block.c \
drivers/io/io_mtd.c \
drivers/io/io_storage.c \
diff --git a/plat/st/stm32mp1/stm32mp1.ld.S b/plat/st/stm32mp1/stm32mp1.ld.S
index 23716ac..2254fee 100644
--- a/plat/st/stm32mp1/stm32mp1.ld.S
+++ b/plat/st/stm32mp1/stm32mp1.ld.S
@@ -16,7 +16,7 @@
ENTRY(__BL2_IMAGE_START__)
MEMORY {
- HEADER (rw) : ORIGIN = 0x00000000, LENGTH = 0x3000
+ HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
}
diff --git a/plat/st/stm32mp1/stm32mp1_boot_device.c b/plat/st/stm32mp1/stm32mp1_boot_device.c
index 997335d..6a05707 100644
--- a/plat/st/stm32mp1/stm32mp1_boot_device.c
+++ b/plat/st/stm32mp1/stm32mp1_boot_device.c
@@ -1,11 +1,12 @@
/*
- * Copyright (c) 2019, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <errno.h>
+#include <common/debug.h>
#include <drivers/nand.h>
#include <drivers/raw_nand.h>
#include <drivers/spi_nand.h>
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index 291342e..c63efd5 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -22,7 +22,6 @@
#include <stm32mp_auth.h>
#include <stm32mp_common.h>
#include <stm32mp_dt.h>
-#include <stm32mp_shres_helpers.h>
#include <stm32mp1_dbgmcu.h>
#include <stm32mp1_private.h>
#include <stm32mp1_shared_resources.h>
@@ -102,6 +101,8 @@
#define STM32MP_PARAM_LOAD_SIZE U(0x00002400) /* 9 KB for param */
/* 256 Octets reserved for header */
#define STM32MP_HEADER_SIZE U(0x00000100)
+/* round_up(STM32MP_PARAM_LOAD_SIZE + STM32MP_HEADER_SIZE, PAGE_SIZE) */
+#define STM32MP_HEADER_RESERVED_SIZE U(0x3000)
#define STM32MP_BINARY_BASE (STM32MP_SEC_SYSRAM_BASE + \
STM32MP_PARAM_LOAD_SIZE + \
diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c
index 0bed12a..9016b0d 100644
--- a/plat/st/stm32mp1/stm32mp1_private.c
+++ b/plat/st/stm32mp1/stm32mp1_private.c
@@ -13,6 +13,7 @@
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <libfdt.h>
+#include <plat/common/platform.h>
#include <platform_def.h>
/* Internal layout of the 32bit OTP word board_id */
@@ -40,6 +41,8 @@
#define TAMP_BOOT_MODE_ITF_MASK U(0x0000FF00)
#define TAMP_BOOT_MODE_ITF_SHIFT 8
+#define TAMP_BOOT_COUNTER_REG_ID U(21)
+
#if defined(IMAGE_BL2)
#define MAP_SEC_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \
STM32MP_SYSRAM_SIZE, \
@@ -597,3 +600,13 @@
*interface = itf >> 4;
*instance = itf & 0xFU;
}
+
+#if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT
+void stm32mp1_fwu_set_boot_idx(void)
+{
+ clk_enable(RTCAPB);
+ mmio_write_32(tamp_bkpr(TAMP_BOOT_COUNTER_REG_ID),
+ plat_fwu_get_boot_idx());
+ clk_disable(RTCAPB);
+}
+#endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */
diff --git a/plat/st/stm32mp1/stm32mp1_syscfg.c b/plat/st/stm32mp1/stm32mp1_syscfg.c
index 793ad71..01a6439 100644
--- a/plat/st/stm32mp1/stm32mp1_syscfg.c
+++ b/plat/st/stm32mp1/stm32mp1_syscfg.c
@@ -1,16 +1,17 @@
/*
- * Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include <platform_def.h>
-
#include <common/debug.h>
+#include <drivers/clk.h>
+#include <drivers/delay_timer.h>
#include <drivers/st/bsec.h>
#include <drivers/st/stpmic1.h>
#include <lib/mmio.h>
+#include <platform_def.h>
#include <stm32mp_dt.h>
#include <stm32mp1_private.h>
@@ -24,6 +25,9 @@
#define SYSCFG_CMPENSETR 0x24U
#define SYSCFG_CMPENCLRR 0x28U
+#define CMPCR_CMPENSETR_OFFSET 0x4U
+#define CMPCR_CMPENCLRR_OFFSET 0x8U
+
/*
* SYSCFG_BOOTR Register
*/
@@ -54,28 +58,66 @@
#define SYSCFG_CMPCR_RAPSRC GENMASK(23, 20)
#define SYSCFG_CMPCR_ANSRC_SHIFT 24
+#define SYSCFG_CMPCR_READY_TIMEOUT_US 10000U
+
/*
* SYSCFG_CMPENSETR Register
*/
#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
-void stm32mp1_syscfg_init(void)
+static void enable_io_comp_cell_finish(uintptr_t cmpcr_off)
{
- uint32_t bootr;
- uint32_t otp = 0;
- uint32_t vdd_voltage;
+ uint64_t start;
- /*
- * Interconnect update : select master using the port 1.
- * LTDC = AXI_M9.
- */
- mmio_write_32(SYSCFG_BASE + SYSCFG_ICNR, SYSCFG_ICNR_AXI_M9);
+ start = timeout_init_us(SYSCFG_CMPCR_READY_TIMEOUT_US);
- /* Disable Pull-Down for boot pin connected to VDD */
- bootr = mmio_read_32(SYSCFG_BASE + SYSCFG_BOOTR) &
- SYSCFG_BOOTR_BOOT_MASK;
- mmio_clrsetbits_32(SYSCFG_BASE + SYSCFG_BOOTR, SYSCFG_BOOTR_BOOTPD_MASK,
- bootr << SYSCFG_BOOTR_BOOTPD_SHIFT);
+ while ((mmio_read_32(SYSCFG_BASE + cmpcr_off) & SYSCFG_CMPCR_READY) == 0U) {
+ if (timeout_elapsed(start)) {
+ /* Failure on IO compensation enable is not a issue: warn only. */
+ WARN("IO compensation cell not ready\n");
+ break;
+ }
+ }
+
+ mmio_clrbits_32(SYSCFG_BASE + cmpcr_off, SYSCFG_CMPCR_SW_CTRL);
+}
+
+static void disable_io_comp_cell(uintptr_t cmpcr_off)
+{
+ uint32_t value;
+
+ if (((mmio_read_32(SYSCFG_BASE + cmpcr_off) & SYSCFG_CMPCR_READY) == 0U) ||
+ ((mmio_read_32(SYSCFG_BASE + cmpcr_off + CMPCR_CMPENSETR_OFFSET) &
+ SYSCFG_CMPENSETR_MPU_EN) == 0U)) {
+ return;
+ }
+
+ value = mmio_read_32(SYSCFG_BASE + cmpcr_off) >> SYSCFG_CMPCR_ANSRC_SHIFT;
+
+ mmio_clrbits_32(SYSCFG_BASE + cmpcr_off, SYSCFG_CMPCR_RANSRC | SYSCFG_CMPCR_RAPSRC);
+
+ value <<= SYSCFG_CMPCR_RANSRC_SHIFT;
+ value |= mmio_read_32(SYSCFG_BASE + cmpcr_off);
+
+ mmio_write_32(SYSCFG_BASE + cmpcr_off, value | SYSCFG_CMPCR_SW_CTRL);
+
+ mmio_setbits_32(SYSCFG_BASE + cmpcr_off + CMPCR_CMPENCLRR_OFFSET, SYSCFG_CMPENSETR_MPU_EN);
+}
+
+static void enable_high_speed_mode_low_voltage(void)
+{
+ mmio_write_32(SYSCFG_BASE + SYSCFG_IOCTRLSETR,
+ SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
+ SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
+ SYSCFG_IOCTRLSETR_HSLVEN_ETH |
+ SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
+ SYSCFG_IOCTRLSETR_HSLVEN_SPI);
+}
+
+static void stm32mp1_syscfg_set_hslv(void)
+{
+ uint32_t otp = 0;
+ uint32_t vdd_voltage;
/*
* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
@@ -105,12 +147,7 @@
if (vdd_voltage == 0U) {
WARN("VDD unknown");
} else if (vdd_voltage < 2700000U) {
- mmio_write_32(SYSCFG_BASE + SYSCFG_IOCTRLSETR,
- SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
- SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
- SYSCFG_IOCTRLSETR_HSLVEN_ETH |
- SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
- SYSCFG_IOCTRLSETR_HSLVEN_SPI);
+ enable_high_speed_mode_low_voltage();
if (otp == 0U) {
INFO("Product_below_2v5=0: HSLVEN protected by HW\n");
@@ -123,33 +160,50 @@
panic();
}
}
+}
+
+void stm32mp1_syscfg_init(void)
+{
+ uint32_t bootr;
+
+ /*
+ * Interconnect update : select master using the port 1.
+ * LTDC = AXI_M9.
+ */
+ mmio_write_32(SYSCFG_BASE + SYSCFG_ICNR, SYSCFG_ICNR_AXI_M9);
- stm32mp1_syscfg_enable_io_compensation();
+ /* Disable Pull-Down for boot pin connected to VDD */
+ bootr = mmio_read_32(SYSCFG_BASE + SYSCFG_BOOTR) &
+ SYSCFG_BOOTR_BOOT_MASK;
+ mmio_clrsetbits_32(SYSCFG_BASE + SYSCFG_BOOTR, SYSCFG_BOOTR_BOOTPD_MASK,
+ bootr << SYSCFG_BOOTR_BOOTPD_SHIFT);
+
+ stm32mp1_syscfg_set_hslv();
+
+ stm32mp1_syscfg_enable_io_compensation_start();
}
-void stm32mp1_syscfg_enable_io_compensation(void)
+void stm32mp1_syscfg_enable_io_compensation_start(void)
{
/*
* Activate automatic I/O compensation.
* Warning: need to ensure CSI enabled and ready in clock driver.
* Enable non-secure clock, we assume non-secure is suspended.
*/
- stm32mp1_clk_enable_non_secure(SYSCFG);
+ clk_enable(SYSCFG);
- mmio_setbits_32(SYSCFG_BASE + SYSCFG_CMPENSETR,
+ mmio_setbits_32(SYSCFG_BASE + CMPCR_CMPENSETR_OFFSET + SYSCFG_CMPCR,
SYSCFG_CMPENSETR_MPU_EN);
-
- while ((mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) &
- SYSCFG_CMPCR_READY) == 0U) {
- ;
- }
+}
- mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
+void stm32mp1_syscfg_enable_io_compensation_finish(void)
+{
+ enable_io_comp_cell_finish(SYSCFG_CMPCR);
}
void stm32mp1_syscfg_disable_io_compensation(void)
{
- uint32_t value;
+ clk_enable(SYSCFG);
/*
* Deactivate automatic I/O compensation.
@@ -157,18 +211,7 @@
* requested for other usages and always OFF in STANDBY.
* Disable non-secure SYSCFG clock, we assume non-secure is suspended.
*/
- value = mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) >>
- SYSCFG_CMPCR_ANSRC_SHIFT;
-
- mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPCR,
- SYSCFG_CMPCR_RANSRC | SYSCFG_CMPCR_RAPSRC);
-
- value = mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) |
- (value << SYSCFG_CMPCR_RANSRC_SHIFT);
-
- mmio_write_32(SYSCFG_BASE + SYSCFG_CMPCR, value | SYSCFG_CMPCR_SW_CTRL);
-
- mmio_setbits_32(SYSCFG_BASE + SYSCFG_CMPENCLRR, SYSCFG_CMPENSETR_MPU_EN);
+ disable_io_comp_cell(SYSCFG_CMPCR);
- stm32mp1_clk_disable_non_secure(SYSCFG);
+ clk_disable(SYSCFG);
}
diff --git a/tools/conventional-changelog-tf-a/package.json b/tools/conventional-changelog-tf-a/package.json
index 3ad853d..404ef90 100644
--- a/tools/conventional-changelog-tf-a/package.json
+++ b/tools/conventional-changelog-tf-a/package.json
@@ -1,6 +1,7 @@
{
"name": "conventional-changelog-tf-a",
- "version": "1.0.0",
+ "version": "2.6.0",
+ "license": "BSD-3-Clause",
"private": true,
"main": "index.js",
"dependencies": {