commit 27569ffc895608dbf0045ce6705f031362c9a566
author Jagadeesh Ujja <jagadeesh.ujja@arm.com> Wed Oct 07 19:51:46 2020 +0530
committer jagadeesh.ujja <jagadeesh.ujja@arm.com> Fri Oct 09 10:43:13 2020 +0000
tree 17ac62fe1e91e6dc2cb7f991c38c97e3df57eef2
parent f273d6d664c273d1bc085ac8952cc5ff0e7f2049

lib/cpus: update MIDR value for rainier cpu

This patch updates the MIDR value for rainier cpu.

Change-Id: I99a5d96f757239cf65b2688095c4ec66cd991cf9
Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm.com>

include/lib/cpus/aarch64/rainier.h

diff --git a/include/lib/cpus/aarch64/rainier.h b/include/lib/cpus/aarch64/rainier.h
index 9ff1669..978661f 100644
--- a/include/lib/cpus/aarch64/rainier.h
+++ b/include/lib/cpus/aarch64/rainier.h
@@ -10,7 +10,7 @@
 #include <lib/utils_def.h>
 
 /* RAINIER MIDR for revision 0 */
-#define RAINIER_MIDR			U(0x3f0f4100)
+#define RAINIER_MIDR			U(0x3f0f4120)
 
 /* Exception Syndrome register EC code for IC Trap */
 #define RAINIER_EC_IC_TRAP		U(0x1f)