Merge "fix(xilinx): warn if reserved memory pre-exists in DT" into integration
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index 56de8b8..a900a9b 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -297,7 +297,9 @@
* calculated using the current SP_MIN PROGBITS debug size plus the sizes of
* BL2 and BL1-RW
*/
-# define PLAT_ARM_MAX_BL32_SIZE UL(0x3B000)
+# define PLAT_ARM_MAX_BL32_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \
+ ARM_SHARED_RAM_SIZE - \
+ ARM_FW_CONFIGS_SIZE)
#endif /* RESET_TO_SP_MIN */
#endif
diff --git a/plat/xilinx/versal/aarch64/versal_common.c b/plat/xilinx/versal/aarch64/versal_common.c
index 9e8134a..4236d8a 100644
--- a/plat/xilinx/versal/aarch64/versal_common.c
+++ b/plat/xilinx/versal/aarch64/versal_common.c
@@ -58,6 +58,10 @@
platform_id = FIELD_GET(PLATFORM_MASK, plat_info[1]);
platform_version = FIELD_GET(PLATFORM_VERSION_MASK, plat_info[1]);
+
+ if (platform_id == VERSAL_COSIM) {
+ platform_id = VERSAL_QEMU;
+ }
}
const char *board_name_decode(void)
@@ -96,8 +100,6 @@
uart_clock = 212000;
break;
case VERSAL_QEMU:
- uart_clock = 25000000;
- break;
case VERSAL_SILICON:
uart_clock = 100000000;
break;
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index 0e4ec1c..57377a9 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -93,9 +93,6 @@
cpu_clock = 212000;
break;
case VERSAL_QEMU:
- /* Random values now */
- cpu_clock = 2720000;
- break;
case VERSAL_SILICON:
cpu_clock = 100000000;
break;
diff --git a/plat/xilinx/versal/include/versal_def.h b/plat/xilinx/versal/include/versal_def.h
index b7691ad..c50df7e 100644
--- a/plat/xilinx/versal/include/versal_def.h
+++ b/plat/xilinx/versal/include/versal_def.h
@@ -30,6 +30,7 @@
#define VERSAL_SPP U(1)
#define VERSAL_EMU U(2)
#define VERSAL_QEMU U(3)
+#define VERSAL_COSIM U(7)
/* Firmware Image Package */
#define VERSAL_PRIMARY_CPU 0